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[SelectionDAG] Propagate Disjoint flag. #88370

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Merged
merged 2 commits into from
Apr 15, 2024
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[SelectionDAG] Propagate Disjoint flag. #88370

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d08e118
Precommit test for propagate disjoint.NFC
fengfeng09 Apr 11, 2024
a85beb8
[SelectionDAG] Propagate Disjoint flag.
fengfeng09 Apr 11, 2024
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3 changes: 2 additions & 1 deletion llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -9530,7 +9530,8 @@ static SDValue combineShiftOfShiftedLogic(SDNode *Shift, SelectionDAG &DAG) {
SDValue ShiftSumC = DAG.getConstant(*C0Val + C1Val, DL, ShiftAmtVT);
SDValue NewShift1 = DAG.getNode(ShiftOpcode, DL, VT, X, ShiftSumC);
SDValue NewShift2 = DAG.getNode(ShiftOpcode, DL, VT, Y, C1);
return DAG.getNode(LogicOpcode, DL, VT, NewShift1, NewShift2);
return DAG.getNode(LogicOpcode, DL, VT, NewShift1, NewShift2,
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https://alive2.llvm.org/ce/z/ttZfv8

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Why do we need to use FlagInserter? Can't we pass the flags to the last argument of getNode?

LogicOp->getFlags());
}

/// Handle transforms common to the three shifts, when the shift amount is a
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3 changes: 2 additions & 1 deletion llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
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Expand Up @@ -544,7 +544,8 @@ bool TargetLowering::ShrinkDemandedConstant(SDValue Op,
if (!C.isSubsetOf(DemandedBits)) {
EVT VT = Op.getValueType();
SDValue NewC = TLO.DAG.getConstant(DemandedBits & C, DL, VT);
SDValue NewOp = TLO.DAG.getNode(Opcode, DL, VT, Op.getOperand(0), NewC);
SDValue NewOp = TLO.DAG.getNode(Opcode, DL, VT, Op.getOperand(0), NewC,
Op->getFlags());
return TLO.CombineTo(Op, NewOp);
}

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15 changes: 15 additions & 0 deletions llvm/test/CodeGen/X86/propagate-disjoint-in-shl-or.ll
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@@ -0,0 +1,15 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=x86_64 %s -start-before=x86-isel -o - | FileCheck %s

define i32 @add_shl_or_disjoint(i32 %x) {
; CHECK-LABEL: add_shl_or_disjoint:
; CHECK: # %bb.0:
; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
; CHECK-NEXT: leal 165036822(,%rdi,4), %eax
; CHECK-NEXT: retq
%or = or disjoint i32 %x, 4027584529
%shl = shl i32 %or, 2
%add = add i32 %shl, 1234567890
ret i32 %add
}