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[SDAG] Apply or-disjoint in SelectionDAG::isBaseWithConstantOffset #88493

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Apr 15, 2024
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11 changes: 2 additions & 9 deletions llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -5203,15 +5203,8 @@ bool SelectionDAG::isADDLike(SDValue Op) const {
}

bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
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Collaborator

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Can we not just simplify this function to:

bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
  return (Op.getOpcode() == ISD::ADD || isADDLike(Op)) &&
         isa<ConstantSDNode>(Op.getOperand(1));
}

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Good suggestion.

if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
!isa<ConstantSDNode>(Op.getOperand(1)))
return false;

if (Op.getOpcode() == ISD::OR &&
!MaskedValueIsZero(Op.getOperand(0), Op.getConstantOperandAPInt(1)))
return false;

return true;
return Op.getNumOperands() == 2 && isa<ConstantSDNode>(Op.getOperand(1)) &&
(Op.getOpcode() == ISD::ADD || isADDLike(Op));
}

bool SelectionDAG::isKnownNeverNaN(SDValue Op, bool SNaN, unsigned Depth) const {
Expand Down
18 changes: 18 additions & 0 deletions llvm/test/CodeGen/AVR/base-with-add-like-constant-offset.ll
Original file line number Diff line number Diff line change
@@ -0,0 +1,18 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=avr %s -start-before=avr-isel -o - | FileCheck %s

define void @test(i16 %x, ptr addrspace(1) %o) {
; CHECK-LABEL: test:
; CHECK: ; %bb.0:
; CHECK-NEXT: mov r30, r22
; CHECK-NEXT: mov r31, r23
; CHECK-NEXT: std Z+11, r25
; CHECK-NEXT: std Z+10, r24
; CHECK-NEXT: ret
%int = ptrtoint ptr addrspace(1) %o to i16
%or = or disjoint i16 %int, 10
%addr = inttoptr i16 %or to ptr addrspace(1)
store i16 %x, ptr addrspace(1) %addr
ret void
}