Skip to content

[InstCombine] Preserve flags for abs(X) * abs(X) and nabs(X) * nabs(X) #88662

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Closed
wants to merge 2 commits into from
Closed

[InstCombine] Preserve flags for abs(X) * abs(X) and nabs(X) * nabs(X) #88662

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
2 commits
Select commit Hold shift + click to select a range
ed886a9
[InstCombine] Pre-commit tests (NFC)
AZero13 Apr 14, 2024
ca3c98a
[InstCombine] Preserve flags for abs(X) * abs(X) and nabs(X) * nabs(X)
AZero13 Apr 14, 2024
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
22 changes: 20 additions & 2 deletions llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -320,8 +320,26 @@ Instruction *InstCombinerImpl::visitMul(BinaryOperator &I) {

// abs(X) * abs(X) -> X * X
Value *X;
if (Op0 == Op1 && match(Op0, m_Intrinsic<Intrinsic::abs>(m_Value(X))))
return BinaryOperator::CreateMul(X, X);
if (Op0 == Op1) {
// nabs(X) * nabs(X) -> X * X
if (match(Op0, m_Neg(m_Intrinsic<Intrinsic::abs>(m_Value(X))))) {
Instruction *NewMul = BinaryOperator::CreateMul(X, X);
if (I.hasNoUnsignedWrap()) {
// (nabs * nabs) nuw in this case also implies nsw
NewMul->setHasNoUnsignedWrap(true);
NewMul->setHasNoSignedWrap(true);
} else if (I.hasNoSignedWrap())
NewMul->setHasNoSignedWrap(true);

return NewMul;
}
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Remove unnecessary nabs handling.

Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

nabs actually has a thing that doesn't apply to abs where if it is nuw, the transformation to x * x is both nuw and nsw.

Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

I am aware, but that does not mean that the extra code is useful.

It's okay to improve poison-propagation of an existing transform, but if you want to do more with that, you'll have to provide proof of real-world usefulness.


if (match(Op0, m_Intrinsic<Intrinsic::abs>(m_Value(X)))) {
Instruction *NewMul = BinaryOperator::CreateMul(X, X);
NewMul->setHasNoSignedWrap(I.hasNoSignedWrap());
return NewMul;
}
}

{
Value *Y;
Expand Down
43 changes: 43 additions & 0 deletions llvm/test/Transforms/InstCombine/mul-inseltpoison.ll
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -915,6 +915,26 @@ define i32 @combine_mul_abs_intrin(i32 %x) {
ret i32 %mul
}

define i32 @combine_mul_abs_intrin_nuw(i32 %x) {
; CHECK-LABEL: @combine_mul_abs_intrin_nuw(
; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[X:%.*]], [[X]]
; CHECK-NEXT: ret i32 [[MUL]]
;
%abs = call i32 @llvm.abs.i32(i32 %x, i1 false)
%mul = mul nuw i32 %abs, %abs
ret i32 %mul
}

define i32 @combine_mul_abs_intrin_nsw(i32 %x) {
; CHECK-LABEL: @combine_mul_abs_intrin_nsw(
; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[X:%.*]], [[X]]
; CHECK-NEXT: ret i32 [[MUL]]
;
%abs = call i32 @llvm.abs.i32(i32 %x, i1 false)
%mul = mul nsw i32 %abs, %abs
ret i32 %mul
}

define i32 @combine_mul_nabs_intrin(i32 %x) {
; CHECK-LABEL: @combine_mul_nabs_intrin(
; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[X:%.*]], [[X]]
Expand All @@ -926,6 +946,29 @@ define i32 @combine_mul_nabs_intrin(i32 %x) {
ret i32 %mul
}

define i32 @combine_mul_nabs_intrin_nuw(i32 %x) {
; CHECK-LABEL: @combine_mul_nabs_intrin_nuw(
; CHECK-NEXT: [[MUL:%.*]] = mul nuw nsw i32 [[X:%.*]], [[X]]
; CHECK-NEXT: ret i32 [[MUL]]
;
%abs = call i32 @llvm.abs.i32(i32 %x, i1 false)
%neg = sub i32 0, %abs
%mul = mul nuw i32 %neg, %neg
ret i32 %mul
}

define i32 @combine_mul_nabs_intrin_nsw(i32 %x) {
; CHECK-LABEL: @combine_mul_nabs_intrin_nsw(
; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[X:%.*]], [[X]]
; CHECK-NEXT: ret i32 [[MUL]]
;
%abs = call i32 @llvm.abs.i32(i32 %x, i1 false)
%neg = sub i32 0, %abs
%mul = mul nsw i32 %neg, %neg
ret i32 %mul
}


; z * splat(0) = splat(0), even for scalable vectors
define <vscale x 2 x i64> @mul_scalable_splat_zero(<vscale x 2 x i64> %z) {
; CHECK-LABEL: @mul_scalable_splat_zero(
Expand Down
71 changes: 71 additions & 0 deletions llvm/test/Transforms/InstCombine/mul.ll
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -1605,6 +1605,31 @@ define i32 @combine_mul_nabs_i32(i32 %0) {
ret i32 %m
}

define i32 @combine_mul_nabs_i32_unsigned_wrap(i32 %0) {
; CHECK-LABEL: @combine_mul_nabs_i32_unsigned_wrap(
; CHECK-NEXT: [[M:%.*]] = mul nuw nsw i32 [[TMP0:%.*]], [[TMP0]]
; CHECK-NEXT: ret i32 [[M]]
;
%c = icmp slt i32 %0, 0
%s = sub nsw i32 0, %0
%r = select i1 %c, i32 %0, i32 %s
%m = mul nuw i32 %r, %r
ret i32 %m
}

define i32 @combine_mul_nabs_i32_signed_wrap(i32 %0) {
; CHECK-LABEL: @combine_mul_nabs_i32_signed_wrap(
; CHECK-NEXT: [[M:%.*]] = mul nsw i32 [[TMP0:%.*]], [[TMP0]]
; CHECK-NEXT: ret i32 [[M]]
;
%c = icmp slt i32 %0, 0
%s = sub nsw i32 0, %0
%r = select i1 %c, i32 %0, i32 %s
%m = mul nsw i32 %r, %r
ret i32 %m
}


define <4 x i32> @combine_mul_nabs_v4i32(<4 x i32> %0) {
; CHECK-LABEL: @combine_mul_nabs_v4i32(
; CHECK-NEXT: [[M:%.*]] = mul <4 x i32> [[TMP0:%.*]], [[TMP0]]
Expand All @@ -1617,6 +1642,30 @@ define <4 x i32> @combine_mul_nabs_v4i32(<4 x i32> %0) {
ret <4 x i32> %m
}

define <4 x i32> @combine_mul_nabs_v4i32_unsigned_wrap(<4 x i32> %0) {
; CHECK-LABEL: @combine_mul_nabs_v4i32_unsigned_wrap(
; CHECK-NEXT: [[M:%.*]] = mul nuw nsw <4 x i32> [[TMP0:%.*]], [[TMP0]]
; CHECK-NEXT: ret <4 x i32> [[M]]
;
%c = icmp slt <4 x i32> %0, zeroinitializer
%s = sub nsw <4 x i32> zeroinitializer, %0
%r = select <4 x i1> %c, <4 x i32> %0, <4 x i32> %s
%m = mul nuw <4 x i32> %r, %r
ret <4 x i32> %m
}

define <4 x i32> @combine_mul_nabs_v4i32_signed_wrap(<4 x i32> %0) {
; CHECK-LABEL: @combine_mul_nabs_v4i32_signed_wrap(
; CHECK-NEXT: [[M:%.*]] = mul nsw <4 x i32> [[TMP0:%.*]], [[TMP0]]
; CHECK-NEXT: ret <4 x i32> [[M]]
;
%c = icmp slt <4 x i32> %0, zeroinitializer
%s = sub nsw <4 x i32> zeroinitializer, %0
%r = select <4 x i1> %c, <4 x i32> %0, <4 x i32> %s
%m = mul nsw <4 x i32> %r, %r
ret <4 x i32> %m
}

define i32 @combine_mul_abs_intrin(i32 %x) {
; CHECK-LABEL: @combine_mul_abs_intrin(
; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[X:%.*]], [[X]]
Expand All @@ -1638,6 +1687,28 @@ define i32 @combine_mul_nabs_intrin(i32 %x) {
ret i32 %mul
}

define i32 @combine_mul_nabs_intrin_unsigned_flags(i32 %x) {
; CHECK-LABEL: @combine_mul_nabs_intrin_unsigned_flags(
; CHECK-NEXT: [[MUL:%.*]] = mul nuw nsw i32 [[X:%.*]], [[X]]
; CHECK-NEXT: ret i32 [[MUL]]
;
%abs = call i32 @llvm.abs.i32(i32 %x, i1 false)
%neg = sub i32 0, %abs
%mul = mul nuw i32 %neg, %neg
ret i32 %mul
}

define i32 @combine_mul_nabs_intrin_signed_flags(i32 %x) {
; CHECK-LABEL: @combine_mul_nabs_intrin_signed_flags(
; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[X:%.*]], [[X]]
; CHECK-NEXT: ret i32 [[MUL]]
;
%abs = call i32 @llvm.abs.i32(i32 %x, i1 false)
%neg = sub i32 0, %abs
%mul = mul nsw i32 %neg, %neg
ret i32 %mul
}

; z * splat(0) = splat(0), even for scalable vectors
define <vscale x 2 x i64> @mul_scalable_splat_zero(<vscale x 2 x i64> %z) {
; CHECK-LABEL: @mul_scalable_splat_zero(
Expand Down
Loading