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[RISCV] Speed up RISCVRegisterInfo::needsFrameBaseReg when frame pointer isn't used. NFC #89163

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Merged
merged 1 commit into from
Apr 18, 2024
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[RISCV] Speed up RISCVRegisterInfo::needsFrameBaseReg when frame pointer isn't used. NFC #89163

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22 changes: 12 additions & 10 deletions llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -607,20 +607,22 @@ bool RISCVRegisterInfo::needsFrameBaseReg(MachineInstr *MI,
const MachineFrameInfo &MFI = MF.getFrameInfo();
const RISCVFrameLowering *TFI = getFrameLowering(MF);
const MachineRegisterInfo &MRI = MF.getRegInfo();
unsigned CalleeSavedSize = 0;
Offset += getFrameIndexInstrOffset(MI, FIOperandNum);

// Estimate the stack size used to store callee saved registers(
// excludes reserved registers).
BitVector ReservedRegs = getReservedRegs(MF);
for (const MCPhysReg *R = MRI.getCalleeSavedRegs(); MCPhysReg Reg = *R; ++R) {
if (!ReservedRegs.test(Reg))
CalleeSavedSize += getSpillSize(*getMinimalPhysRegClass(Reg));
}
if (TFI->hasFP(MF) && !shouldRealignStack(MF)) {
// Estimate the stack size used to store callee saved registers(
// excludes reserved registers).
unsigned CalleeSavedSize = 0;
BitVector ReservedRegs = getReservedRegs(MF);
for (const MCPhysReg *R = MRI.getCalleeSavedRegs(); MCPhysReg Reg = *R;
++R) {
if (!ReservedRegs.test(Reg))
CalleeSavedSize += getSpillSize(*getMinimalPhysRegClass(Reg));
}

int64_t MaxFPOffset = Offset - CalleeSavedSize;
if (TFI->hasFP(MF) && !shouldRealignStack(MF))
int64_t MaxFPOffset = Offset - CalleeSavedSize;
return !isFrameOffsetLegal(MI, RISCV::X8, MaxFPOffset);
}

// Assume 128 bytes spill slots size to estimate the maximum possible
// offset relative to the stack pointer.
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