Skip to content

[Clang][CodeGen] Optimised LLVM IR for atomic increments/decrements on floats #89362

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 4 commits into from
May 2, 2024
Merged
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
13 changes: 13 additions & 0 deletions clang/lib/CodeGen/CGExprScalar.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2792,6 +2792,19 @@ ScalarExprEmitter::EmitScalarPrePostIncDec(const UnaryOperator *E, LValue LV,
llvm::AtomicOrdering::SequentiallyConsistent);
return isPre ? Builder.CreateBinOp(op, old, amt) : old;
}
// Special case for atomic increment/decrement on floats
if (type->isFloatingType()) {
llvm::AtomicRMWInst::BinOp aop =
isInc ? llvm::AtomicRMWInst::FAdd : llvm::AtomicRMWInst::FSub;
llvm::Instruction::BinaryOps op =
isInc ? llvm::Instruction::FAdd : llvm::Instruction::FSub;
llvm::Value *amt = llvm::ConstantFP::get(
VMContext, llvm::APFloat(static_cast<float>(1.0)));
llvm::Value *old =
Builder.CreateAtomicRMW(aop, LV.getAddress(CGF), amt,
llvm::AtomicOrdering::SequentiallyConsistent);
return isPre ? Builder.CreateBinOp(op, old, amt) : old;
}
value = EmitLoadOfLValue(LV, E->getExprLoc());
input = value;
// For every other atomic operation, we need to emit a load-op-cmpxchg loop
Expand Down
69 changes: 69 additions & 0 deletions clang/test/CodeGen/X86/x86-atomic-float.c
Original file line number Diff line number Diff line change
@@ -0,0 +1,69 @@
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4
// RUN: %clang_cc1 -triple x86_64-linux-gnu -target-cpu core2 %s -S -emit-llvm -o - | FileCheck -check-prefixes=CHECK,CHECK64 %s
// RUN: %clang_cc1 -triple i686-linux-gnu -target-cpu core2 %s -S -emit-llvm -o - | FileCheck -check-prefixes=CHECK,CHECK32 %s


// CHECK-LABEL: define dso_local i32 @test_int_inc(
// CHECK-SAME: ) #[[ATTR0:[0-9]+]] {
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = atomicrmw add ptr @test_int_inc.n, i32 1 seq_cst, align 4
// CHECK-NEXT: ret i32 [[TMP0]]
//
int test_int_inc()
{
static _Atomic int n;
return n++;
}

// CHECK-LABEL: define dso_local float @test_float_post_inc(
// CHECK-SAME: ) #[[ATTR0]] {
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = atomicrmw fadd ptr @test_float_post_inc.n, float 1.000000e+00 seq_cst, align 4
// CHECK-NEXT: ret float [[TMP0]]
//
float test_float_post_inc()
{
static _Atomic float n;
return n++;
}

// CHECK-LABEL: define dso_local float @test_float_post_dc(
// CHECK-SAME: ) #[[ATTR0]] {
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = atomicrmw fsub ptr @test_float_post_dc.n, float 1.000000e+00 seq_cst, align 4
// CHECK-NEXT: ret float [[TMP0]]
//
float test_float_post_dc()
{
static _Atomic float n;
return n--;
}

// CHECK-LABEL: define dso_local float @test_float_pre_dc(
// CHECK-SAME: ) #[[ATTR0]] {
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = atomicrmw fsub ptr @test_float_pre_dc.n, float 1.000000e+00 seq_cst, align 4
// CHECK-NEXT: [[TMP1:%.*]] = fsub float [[TMP0]], 1.000000e+00
// CHECK-NEXT: ret float [[TMP1]]
//
float test_float_pre_dc()
{
static _Atomic float n;
return --n;
}

// CHECK-LABEL: define dso_local float @test_float_pre_inc(
// CHECK-SAME: ) #[[ATTR0]] {
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = atomicrmw fadd ptr @test_float_pre_inc.n, float 1.000000e+00 seq_cst, align 4
// CHECK-NEXT: [[TMP1:%.*]] = fadd float [[TMP0]], 1.000000e+00
// CHECK-NEXT: ret float [[TMP1]]
//
float test_float_pre_inc()
{
static _Atomic float n;
return ++n;
}
//// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
// CHECK32: {{.*}}
// CHECK64: {{.*}}
Loading