Skip to content

[SystemZ] Add TPEI instruction and Associated Facility #89372

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 1 commit into from
Apr 19, 2024
Merged
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
8 changes: 7 additions & 1 deletion llvm/lib/Target/SystemZ/SystemZFeatures.td
Original file line number Diff line number Diff line change
Expand Up @@ -246,14 +246,20 @@ def FeatureInsertReferenceBitsMultiple : SystemZFeature<
"Assume that the insert-reference-bits-multiple facility is installed"
>;

def FeatureTestPendingExternalInterruption : SystemZFeature<
"test-pending-external-interruption", "TestPendingExternalInterruption", (all_of FeatureTestPendingExternalInterruption),
"Assume that the test-pending-external-interruption facility is installed"
>;

def Arch12NewFeatures : SystemZFeatureList<[
FeatureMiscellaneousExtensions2,
FeatureGuardedStorage,
FeatureMessageSecurityAssist7,
FeatureMessageSecurityAssist8,
FeatureVectorEnhancements1,
FeatureVectorPackedDecimal,
FeatureInsertReferenceBitsMultiple
FeatureInsertReferenceBitsMultiple,
FeatureTestPendingExternalInterruption
]>;

//===----------------------------------------------------------------------===//
Expand Down
4 changes: 4 additions & 0 deletions llvm/lib/Target/SystemZ/SystemZInstrSystem.td
Original file line number Diff line number Diff line change
Expand Up @@ -541,6 +541,10 @@ let hasSideEffects = 1, Defs = [CC] in
let hasSideEffects = 1, Defs = [CC] in
def TPI : StoreInherentS<"tpi", 0xB236, null_frag, 0>;

// Test pending external interruption.
let hasSideEffects = 1, Defs = [CC], Predicates = [FeatureTestPendingExternalInterruption] in
def TPEI : UnaryRRE<"tpei", 0xB9A1, null_frag, GR64, GR64>;

// Set address limit.
let hasSideEffects = 1, Uses = [R1L] in
def SAL : SideEffectInherentS<"sal", 0xB237, null_frag>;
Expand Down
2 changes: 1 addition & 1 deletion llvm/lib/Target/SystemZ/SystemZScheduleZ14.td
Original file line number Diff line number Diff line change
Expand Up @@ -1640,7 +1640,7 @@ def : InstRW<[WLat30, MCD], (instregex "(M|S|ST|T)SCH$")>;
def : InstRW<[WLat30, MCD], (instregex "RCHP$")>;
def : InstRW<[WLat30, MCD], (instregex "SCHM$")>;
def : InstRW<[WLat30, MCD], (instregex "STC(PS|RW)$")>;
def : InstRW<[WLat30, MCD], (instregex "TPI$")>;
def : InstRW<[WLat30, MCD], (instregex "TPE?I$")>;
def : InstRW<[WLat30, MCD], (instregex "SAL$")>;

}
Expand Down
2 changes: 1 addition & 1 deletion llvm/lib/Target/SystemZ/SystemZScheduleZ15.td
Original file line number Diff line number Diff line change
Expand Up @@ -1686,7 +1686,7 @@ def : InstRW<[WLat30, MCD], (instregex "(M|S|ST|T)SCH$")>;
def : InstRW<[WLat30, MCD], (instregex "RCHP$")>;
def : InstRW<[WLat30, MCD], (instregex "SCHM$")>;
def : InstRW<[WLat30, MCD], (instregex "STC(PS|RW)$")>;
def : InstRW<[WLat30, MCD], (instregex "TPI$")>;
def : InstRW<[WLat30, MCD], (instregex "TPE?I$")>;
def : InstRW<[WLat30, MCD], (instregex "SAL$")>;

}
Expand Down
2 changes: 1 addition & 1 deletion llvm/lib/Target/SystemZ/SystemZScheduleZ16.td
Original file line number Diff line number Diff line change
Expand Up @@ -1719,7 +1719,7 @@ def : InstRW<[WLat30, MCD], (instregex "(M|S|ST|T)SCH$")>;
def : InstRW<[WLat30, MCD], (instregex "RCHP$")>;
def : InstRW<[WLat30, MCD], (instregex "SCHM$")>;
def : InstRW<[WLat30, MCD], (instregex "STC(PS|RW)$")>;
def : InstRW<[WLat30, MCD], (instregex "TPI$")>;
def : InstRW<[WLat30, MCD], (instregex "TPE?I$")>;
def : InstRW<[WLat30, MCD], (instregex "SAL$")>;

}
Expand Down
8 changes: 8 additions & 0 deletions llvm/test/MC/Disassembler/SystemZ/insns-z14.txt
Original file line number Diff line number Diff line change
Expand Up @@ -3251,3 +3251,11 @@
# CHECK: wftcixb %v4, %v21, 1656
0xe7 0x45 0x67 0x88 0x44 0x4a

# CHECK: tpei %r0, %r15
0xb9 0xa1 0x00 0x0f

# CHECK: tpei %r15, %r0
0xb9 0xa1 0x00 0xf0

# CHECK: tpei %r4, %r10
0xb9 0xa1 0x00 0x4a
3 changes: 3 additions & 0 deletions llvm/test/MC/SystemZ/insn-bad-z13.s
Original file line number Diff line number Diff line change
Expand Up @@ -3024,3 +3024,6 @@
wledb %v0, %v0, -1, 0
wledb %v0, %v0, 16, 0

#CHECK: error: instruction requires: test-pending-external-interrupt
#CHECK: tpei %r0, %r1
tpei %r0, %r1
6 changes: 6 additions & 0 deletions llvm/test/MC/SystemZ/insn-good-z14.s
Original file line number Diff line number Diff line change
Expand Up @@ -2720,3 +2720,9 @@
wftcixb %v31, %v0, 0
wftcixb %v4, %v21, 0x678

#CHECK: tpei %r0, %r15 # encoding: [0xb9,0xa1,0x00,0x0f]
#CHECK: tpei %r15, %r0 # encoding: [0xb9,0xa1,0x00,0xf0]
#CHECK: tpei %r4, %r10 # encoding: [0xb9,0xa1,0x00,0x4a]
tpei %r0, %r15
tpei %r15, %r0
tpei %r4, %r10