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[AArch64] NFC: Add RUN lines for streaming-compatible code. #90617

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merged 1 commit into from
May 1, 2024
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[AArch64] NFC: Add RUN lines for streaming-compatible code. #90617

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83 changes: 83 additions & 0 deletions llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-and-combine.ll
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Original file line number Diff line number Diff line change
@@ -1,6 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mattr=+sve -force-streaming-compatible-sve < %s | FileCheck %s
; RUN: llc -mattr=+sme -force-streaming-compatible-sve < %s | FileCheck %s
; RUN: llc -force-streaming-compatible-sve < %s | FileCheck %s --check-prefix=NONEON-NOSVE

target triple = "aarch64-unknown-linux-gnu"

Expand All @@ -14,6 +15,12 @@ define <4 x i8> @vls_sve_and_4xi8(<4 x i8> %b) nounwind {
; CHECK-NEXT: and z0.d, z0.d, z1.d
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
; CHECK-NEXT: ret
;
; NONEON-NOSVE-LABEL: vls_sve_and_4xi8:
; NONEON-NOSVE: // %bb.0:
; NONEON-NOSVE-NEXT: movi d1, #0xff000000ff0000
; NONEON-NOSVE-NEXT: and v0.8b, v0.8b, v1.8b
; NONEON-NOSVE-NEXT: ret
%c = and <4 x i8> %b, <i8 0, i8 255, i8 0, i8 255>
ret <4 x i8> %c
}
Expand All @@ -27,6 +34,12 @@ define <8 x i8> @vls_sve_and_8xi8(<8 x i8> %b) nounwind {
; CHECK-NEXT: and z0.d, z0.d, z1.d
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
; CHECK-NEXT: ret
;
; NONEON-NOSVE-LABEL: vls_sve_and_8xi8:
; NONEON-NOSVE: // %bb.0:
; NONEON-NOSVE-NEXT: movi d1, #0xff00ff00ff00ff00
; NONEON-NOSVE-NEXT: and v0.8b, v0.8b, v1.8b
; NONEON-NOSVE-NEXT: ret
%c = and <8 x i8> %b, <i8 0, i8 255, i8 0, i8 255, i8 0, i8 255, i8 0, i8 255>
ret <8 x i8> %c
}
Expand All @@ -40,6 +53,12 @@ define <16 x i8> @vls_sve_and_16xi8(<16 x i8> %b) nounwind {
; CHECK-NEXT: and z0.d, z0.d, z1.d
; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
; CHECK-NEXT: ret
;
; NONEON-NOSVE-LABEL: vls_sve_and_16xi8:
; NONEON-NOSVE: // %bb.0:
; NONEON-NOSVE-NEXT: movi v1.2d, #0xff00ff00ff00ff00
; NONEON-NOSVE-NEXT: and v0.16b, v0.16b, v1.16b
; NONEON-NOSVE-NEXT: ret
%c = and <16 x i8> %b, <i8 0, i8 255, i8 0, i8 255, i8 0, i8 255, i8 0, i8 255, i8 0, i8 255, i8 0, i8 255, i8 0, i8 255, i8 0, i8 255>
ret <16 x i8> %c
}
Expand All @@ -56,6 +75,13 @@ define <32 x i8> @vls_sve_and_32xi8(<32 x i8> %ap) nounwind {
; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
; CHECK-NEXT: // kill: def $q1 killed $q1 killed $z1
; CHECK-NEXT: ret
;
; NONEON-NOSVE-LABEL: vls_sve_and_32xi8:
; NONEON-NOSVE: // %bb.0:
; NONEON-NOSVE-NEXT: movi v2.2d, #0xff00ff00ff00ff00
; NONEON-NOSVE-NEXT: and v0.16b, v0.16b, v2.16b
; NONEON-NOSVE-NEXT: and v1.16b, v1.16b, v2.16b
; NONEON-NOSVE-NEXT: ret
%b = and <32 x i8> %ap, <i8 0, i8 255, i8 0, i8 255, i8 0, i8 255, i8 0, i8 255, i8 0, i8 255, i8 0, i8 255, i8 0, i8 255, i8 0, i8 255,
i8 0, i8 255, i8 0, i8 255, i8 0, i8 255, i8 0, i8 255, i8 0, i8 255, i8 0, i8 255, i8 0, i8 255, i8 0, i8 255>
ret <32 x i8> %b
Expand All @@ -73,6 +99,13 @@ define <2 x i16> @vls_sve_and_2xi16(<2 x i16> %b) nounwind {
; CHECK-NEXT: ldr d0, [sp, #8]
; CHECK-NEXT: add sp, sp, #16
; CHECK-NEXT: ret
;
; NONEON-NOSVE-LABEL: vls_sve_and_2xi16:
; NONEON-NOSVE: // %bb.0:
; NONEON-NOSVE-NEXT: // kill: def $d0 killed $d0 def $q0
; NONEON-NOSVE-NEXT: mov v0.s[0], wzr
; NONEON-NOSVE-NEXT: // kill: def $d0 killed $d0 killed $q0
; NONEON-NOSVE-NEXT: ret
%c = and <2 x i16> %b, <i16 0, i16 65535>
ret <2 x i16> %c
}
Expand All @@ -86,6 +119,12 @@ define <4 x i16> @vls_sve_and_4xi16(<4 x i16> %b) nounwind {
; CHECK-NEXT: and z0.d, z0.d, z1.d
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
; CHECK-NEXT: ret
;
; NONEON-NOSVE-LABEL: vls_sve_and_4xi16:
; NONEON-NOSVE: // %bb.0:
; NONEON-NOSVE-NEXT: movi d1, #0xffff0000ffff0000
; NONEON-NOSVE-NEXT: and v0.8b, v0.8b, v1.8b
; NONEON-NOSVE-NEXT: ret
%c = and <4 x i16> %b, <i16 0, i16 65535, i16 0, i16 65535>
ret <4 x i16> %c
}
Expand All @@ -99,6 +138,12 @@ define <8 x i16> @vls_sve_and_8xi16(<8 x i16> %b) nounwind {
; CHECK-NEXT: and z0.d, z0.d, z1.d
; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
; CHECK-NEXT: ret
;
; NONEON-NOSVE-LABEL: vls_sve_and_8xi16:
; NONEON-NOSVE: // %bb.0:
; NONEON-NOSVE-NEXT: movi v1.2d, #0xffff0000ffff0000
; NONEON-NOSVE-NEXT: and v0.16b, v0.16b, v1.16b
; NONEON-NOSVE-NEXT: ret
%c = and <8 x i16> %b, <i16 0, i16 65535, i16 0, i16 65535, i16 0, i16 65535, i16 0, i16 65535>
ret <8 x i16> %c
}
Expand All @@ -115,6 +160,13 @@ define <16 x i16> @vls_sve_and_16xi16(<16 x i16> %b) nounwind {
; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
; CHECK-NEXT: // kill: def $q1 killed $q1 killed $z1
; CHECK-NEXT: ret
;
; NONEON-NOSVE-LABEL: vls_sve_and_16xi16:
; NONEON-NOSVE: // %bb.0:
; NONEON-NOSVE-NEXT: movi v2.2d, #0xffff0000ffff0000
; NONEON-NOSVE-NEXT: and v0.16b, v0.16b, v2.16b
; NONEON-NOSVE-NEXT: and v1.16b, v1.16b, v2.16b
; NONEON-NOSVE-NEXT: ret
%c = and <16 x i16> %b, <i16 0, i16 65535, i16 0, i16 65535, i16 0, i16 65535, i16 0, i16 65535, i16 0, i16 65535, i16 0, i16 65535, i16 0, i16 65535, i16 0, i16 65535>
ret <16 x i16> %c
}
Expand All @@ -128,6 +180,13 @@ define <2 x i32> @vls_sve_and_2xi32(<2 x i32> %b) nounwind {
; CHECK-NEXT: and z0.d, z0.d, z1.d
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
; CHECK-NEXT: ret
;
; NONEON-NOSVE-LABEL: vls_sve_and_2xi32:
; NONEON-NOSVE: // %bb.0:
; NONEON-NOSVE-NEXT: // kill: def $d0 killed $d0 def $q0
; NONEON-NOSVE-NEXT: mov v0.s[0], wzr
; NONEON-NOSVE-NEXT: // kill: def $d0 killed $d0 killed $q0
; NONEON-NOSVE-NEXT: ret
%c = and <2 x i32> %b, <i32 0, i32 4294967295>
ret <2 x i32> %c
}
Expand All @@ -141,6 +200,12 @@ define <4 x i32> @vls_sve_and_4xi32(<4 x i32> %b) nounwind {
; CHECK-NEXT: and z0.d, z0.d, z1.d
; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
; CHECK-NEXT: ret
;
; NONEON-NOSVE-LABEL: vls_sve_and_4xi32:
; NONEON-NOSVE: // %bb.0:
; NONEON-NOSVE-NEXT: movi v1.2d, #0xffffffff00000000
; NONEON-NOSVE-NEXT: and v0.16b, v0.16b, v1.16b
; NONEON-NOSVE-NEXT: ret
%c = and <4 x i32> %b, <i32 0, i32 4294967295, i32 0, i32 4294967295>
ret <4 x i32> %c
}
Expand All @@ -157,6 +222,13 @@ define <8 x i32> @vls_sve_and_8xi32(<8 x i32> %b) nounwind {
; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
; CHECK-NEXT: // kill: def $q1 killed $q1 killed $z1
; CHECK-NEXT: ret
;
; NONEON-NOSVE-LABEL: vls_sve_and_8xi32:
; NONEON-NOSVE: // %bb.0:
; NONEON-NOSVE-NEXT: movi v2.2d, #0xffffffff00000000
; NONEON-NOSVE-NEXT: and v0.16b, v0.16b, v2.16b
; NONEON-NOSVE-NEXT: and v1.16b, v1.16b, v2.16b
; NONEON-NOSVE-NEXT: ret
%c = and <8 x i32> %b, <i32 0, i32 4294967295, i32 0, i32 4294967295, i32 0, i32 4294967295, i32 0, i32 4294967295>
ret <8 x i32> %c
}
Expand All @@ -170,6 +242,11 @@ define <2 x i64> @vls_sve_and_2xi64(<2 x i64> %b) nounwind {
; CHECK-NEXT: and z0.d, z0.d, z1.d
; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
; CHECK-NEXT: ret
;
; NONEON-NOSVE-LABEL: vls_sve_and_2xi64:
; NONEON-NOSVE: // %bb.0:
; NONEON-NOSVE-NEXT: mov v0.d[0], xzr
; NONEON-NOSVE-NEXT: ret
%c = and <2 x i64> %b, <i64 0, i64 18446744073709551615>
ret <2 x i64> %c
}
Expand All @@ -185,6 +262,12 @@ define <4 x i64> @vls_sve_and_4xi64(<4 x i64> %b) nounwind {
; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
; CHECK-NEXT: // kill: def $q1 killed $q1 killed $z1
; CHECK-NEXT: ret
;
; NONEON-NOSVE-LABEL: vls_sve_and_4xi64:
; NONEON-NOSVE: // %bb.0:
; NONEON-NOSVE-NEXT: mov v0.d[0], xzr
; NONEON-NOSVE-NEXT: mov v1.d[0], xzr
; NONEON-NOSVE-NEXT: ret
%c = and <4 x i64> %b, <i64 0, i64 18446744073709551615, i64 0, i64 18446744073709551615>
ret <4 x i64> %c
}
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