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[DAGCombiner] In mergeTruncStore, make sure we aren't storing shifted in bits. #90939

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May 3, 2024
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4 changes: 4 additions & 0 deletions llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -8840,6 +8840,10 @@ SDValue DAGCombiner::mergeTruncStores(StoreSDNode *N) {
if (ShiftAmtC % NarrowNumBits != 0)
return SDValue();

// Make sure we aren't reading bits that are shifted in.
if (ShiftAmtC > WideVal.getScalarValueSizeInBits() - NarrowNumBits)
return SDValue();

Offset = ShiftAmtC / NarrowNumBits;
WideVal = WideVal.getOperand(0);
}
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6 changes: 4 additions & 2 deletions llvm/test/CodeGen/AArch64/pr90936.ll
Original file line number Diff line number Diff line change
Expand Up @@ -3,8 +3,10 @@

define void @f(i16 %arg, ptr %arg1) {
; CHECK-LABEL: f:
; CHECK: // %bb.0: // %bb
; CHECK-NEXT: strh w0, [x1]
; CHECK: // %bb.0:
; CHECK-NEXT: ubfx w8, w0, #8, #6
; CHECK-NEXT: strb w0, [x1]
; CHECK-NEXT: strb w8, [x1, #1]
; CHECK-NEXT: ret
bb:
%i = trunc i16 %arg to i8
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