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[PowerPC] handle toc-data in load selection of fast-isel #91916

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Merged
merged 3 commits into from
May 24, 2024
Merged

[PowerPC] handle toc-data in load selection of fast-isel #91916

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8efdc5d
[PowerPC] handle toc-data in load selection of fast-isel
May 13, 2024
52f0575
add test for large code model
May 22, 2024
8897d71
address comments
May 23, 2024
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14 changes: 7 additions & 7 deletions llvm/lib/Target/PowerPC/PPCFastISel.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -2074,16 +2074,15 @@ unsigned PPCFastISel::PPCMaterializeGV(const GlobalValue *GV, MVT VT) {
if (GV->isThreadLocal())
return 0;

// If the global has the toc-data attribute then fallback to DAG-ISEL.
if (TM.getTargetTriple().isOSAIX())
if (const GlobalVariable *Var = dyn_cast_or_null<GlobalVariable>(GV))
if (Var->hasAttribute("toc-data"))
return false;

PPCFuncInfo->setUsesTOCBasePtr();
bool IsAIXTocData = TM.getTargetTriple().isOSAIX() &&
isa<GlobalVariable>(GV) &&
cast<GlobalVariable>(GV)->hasAttribute("toc-data");

// For small code model, generate a simple TOC load.
if (CModel == CodeModel::Small)
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(PPC::LDtoc),
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD,
IsAIXTocData ? TII.get(PPC::ADDItoc8) : TII.get(PPC::LDtoc),
DestReg)
.addGlobalAddress(GV)
.addReg(PPC::X2);
Expand All @@ -2101,6 +2100,7 @@ unsigned PPCFastISel::PPCMaterializeGV(const GlobalValue *GV, MVT VT) {
HighPartReg).addReg(PPC::X2).addGlobalAddress(GV);

if (Subtarget->isGVIndirectSymbol(GV)) {
assert(!IsAIXTocData && "TOC data should always be direct.");
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(PPC::LDtocL),
DestReg).addGlobalAddress(GV).addReg(HighPartReg);
} else {
Expand Down
15 changes: 10 additions & 5 deletions llvm/test/CodeGen/PowerPC/aix-tocdata-fastisel.ll
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@@ -1,19 +1,24 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
; RUN: llc < %s -mtriple=powerpc64-ibm-aix-xcoff -fast-isel -verify-machineinstrs \
; RUN: -code-model=small | FileCheck %s --check-prefix=SMALL

;; FIXME: when toc data for 64 big large code model is supported,
;; add a run line for large code model too.
; RUN: llc < %s -mtriple=powerpc64-ibm-aix-xcoff -fast-isel -verify-machineinstrs \
; RUN: -code-model=large | FileCheck %s --check-prefix=LARGE

@a = global i32 0, align 4 #0

define signext i32 @foo() #1 {
; SMALL-LABEL: foo:
; SMALL: # %bb.0: # %entry
; SMALL-NEXT: la 3, a[TD](2)
; SMALL-NEXT: lwz 3, 0(3)
; SMALL-NEXT: extsw 3, 3
; SMALL-NEXT: lwa 3, 0(3)
; SMALL-NEXT: blr
;
; LARGE-LABEL: foo:
; LARGE: # %bb.0: # %entry
; LARGE-NEXT: addis 3, a[TD]@u(2)
; LARGE-NEXT: la 3, a[TD]@l(3)
; LARGE-NEXT: lwa 3, 0(3)
; LARGE-NEXT: blr
entry:
%0 = load i32, ptr @a, align 4
ret i32 %0
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/PowerPC/toc-data.ll
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Expand Up @@ -49,8 +49,8 @@ define dso_local void @write_int(i32 signext %in) {

; CHECK64-NOOPT: name: write_int
; CHECK64-NOOPT: %[[SUBREG:[0-9]+]]:gprc = COPY %{{[0-9]}}.sub_32
; CHECK64-NOOPT: %[[ADDR:[0-9]+]]:g8rc_and_g8rc_nox0 = ADDItoc8 @i, $x2 :: (load (s64) from got)
; CHECK64-NOOPT: STW %[[SUBREG]], 0, killed %[[ADDR]] :: (store (s32) into @i)
; CHECK64-NOOPT: %[[ADDR:[0-9]+]]:g8rc_and_g8rc_nox0 = ADDItoc8 @i, $x2
; CHECK64-NOOPT: STW %[[SUBREG]], 0, %[[ADDR]]

; TEST64: .write_int:
; TEST64: la 4, i[TD](2)
Expand Down Expand Up @@ -141,7 +141,7 @@ define dso_local float @read_float() {

; CHECK64-NOOPT: name: read_float
; CHECK64-NOOPT: %[[SCRATCH:[0-9]+]]:g8rc_and_g8rc_nox0 = ADDItoc8 @f, $x2
; CHECK64-NOOPT: %{{[0-9]+}}:f4rc = LFS 0, killed %[[SCRATCH]]
; CHECK64-NOOPT: %{{[0-9]+}}:f4rc = LFS 0, %[[SCRATCH]]

; TEST64: .read_float:
; TEST64: la 3, f[TD](2)
Expand Down Expand Up @@ -228,7 +228,7 @@ define dso_local nonnull ptr @addr() {
; CHECK64-NEXT: $x3 = COPY %[[SCRATCH]]

; CHECK64-NOOPT: name: addr
; CHECK64-NOOPT: %[[SCRATCH:[0-9]+]]:g8rc = ADDItoc8 @i, $x2
; CHECK64-NOOPT: %[[SCRATCH:[0-9]+]]:g8rc_and_g8rc_nox0 = ADDItoc8 @i, $x2
; CHECK64-NOOPT: $x3 = COPY %[[SCRATCH]]

; TEST64: .addr
Expand Down
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