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[TableGen][SubtargetEmitter] Refactor hasReadOfWrite to CodeGenProcModel #92032

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Merged
merged 2 commits into from
May 14, 2024
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[TableGen][SubtargetEmitter] Refactor hasReadOfWrite to CodeGenProcModel #92032

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453db2e
[TableGen][SubtargetEmitter] Refactor hasReadOfWrite to take ProcMode…
michaelmaitland May 13, 2024
a71f334
fixup! move to CodeGenProcModel
michaelmaitland May 14, 2024
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21 changes: 9 additions & 12 deletions llvm/utils/TableGen/Common/CodeGenSchedule.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -746,18 +746,6 @@ unsigned CodeGenSchedModels::getSchedRWIdx(const Record *Def,
return I == RWVec.end() ? 0 : std::distance(RWVec.begin(), I);
}

bool CodeGenSchedModels::hasReadOfWrite(Record *WriteDef) const {
for (auto &ProcModel : ProcModels) {
const RecVec &RADefs = ProcModel.ReadAdvanceDefs;
for (auto &RADef : RADefs) {
RecVec ValidWrites = RADef->getValueAsListOfDefs("ValidWrites");
if (is_contained(ValidWrites, WriteDef))
return true;
}
}
return false;
}

static void splitSchedReadWrites(const RecVec &RWDefs, RecVec &WriteDefs,
RecVec &ReadDefs) {
for (Record *RWDef : RWDefs) {
Expand Down Expand Up @@ -2226,6 +2214,15 @@ bool CodeGenProcModel::isUnsupported(const CodeGenInstruction &Inst) const {
return false;
}

bool CodeGenProcModel::hasReadOfWrite(Record *WriteDef) const {
for (auto &RADef : ReadAdvanceDefs) {
RecVec ValidWrites = RADef->getValueAsListOfDefs("ValidWrites");
if (is_contained(ValidWrites, WriteDef))
return true;
}
return false;
}

#ifndef NDEBUG
void CodeGenProcModel::dump() const {
dbgs() << Index << ": " << ModelName << " "
Expand Down
6 changes: 3 additions & 3 deletions llvm/utils/TableGen/Common/CodeGenSchedule.h
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Expand Up @@ -277,6 +277,9 @@ struct CodeGenProcModel {

bool isUnsupported(const CodeGenInstruction &Inst) const;

// Return true if the given write record is referenced by a ReadAdvance.
bool hasReadOfWrite(Record *WriteDef) const;

#ifndef NDEBUG
void dump() const;
#endif
Expand Down Expand Up @@ -536,9 +539,6 @@ class CodeGenSchedModels {

unsigned getSchedRWIdx(const Record *Def, bool IsRead) const;

// Return true if the given write record is referenced by a ReadAdvance.
bool hasReadOfWrite(Record *WriteDef) const;

// Get a SchedClass from its index.
CodeGenSchedClass &getSchedClass(unsigned Idx) {
assert(Idx < SchedClasses.size() && "bad SchedClass index");
Expand Down
4 changes: 1 addition & 3 deletions llvm/utils/TableGen/SubtargetEmitter.cpp
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Expand Up @@ -1122,10 +1122,8 @@ void SubtargetEmitter::GenSchedClassTables(const CodeGenProcModel &ProcModel,
WriterNames.push_back(SchedModels.getSchedWrite(WriteID).Name);
// If this Write is not referenced by a ReadAdvance, don't distinguish it
// from other WriteLatency entries.
if (!SchedModels.hasReadOfWrite(
SchedModels.getSchedWrite(WriteID).TheDef)) {
if (!ProcModel.hasReadOfWrite(SchedModels.getSchedWrite(WriteID).TheDef))
WriteID = 0;
}
WLEntry.WriteResourceID = WriteID;

for (unsigned WS : WriteSeq) {
Expand Down
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