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[RISCV] Gate unratified profiles behind -menable-experimental-extensions #92167

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Merged
merged 1 commit into from
May 15, 2024
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[RISCV] Gate unratified profiles behind -menable-experimental-extensions #92167

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10 changes: 7 additions & 3 deletions clang/test/Driver/riscv-profiles.c
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Original file line number Diff line number Diff line change
Expand Up @@ -111,7 +111,7 @@
// RVA22S64: "-target-feature" "+svinval"
// RVA22S64: "-target-feature" "+svpbmt"

// RUN: %clang --target=riscv64 -### -c %s 2>&1 -march=rva23u64 \
// RUN: %clang --target=riscv64 -### -c %s 2>&1 -march=rva23u64 -menable-experimental-extensions \
// RUN: | FileCheck -check-prefix=RVA23U64 %s
// RVA23U64: "-target-feature" "+m"
// RVA23U64: "-target-feature" "+a"
Expand Down Expand Up @@ -207,7 +207,7 @@
// RVA23S64: "-target-feature" "+svnapot"
// RVA23S64: "-target-feature" "+svpbmt"

// RUN: %clang --target=riscv64 -### -c %s 2>&1 -march=rvb23u64 \
// RUN: %clang --target=riscv64 -### -c %s 2>&1 -march=rvb23u64 -menable-experimental-extensions \
// RUN: | FileCheck -check-prefix=RVB23U64 %s
// RVB23U64: "-target-feature" "+m"
// RVB23U64: "-target-feature" "+a"
Expand Down Expand Up @@ -284,7 +284,7 @@
// RVB23S64: "-target-feature" "+svnapot"
// RVB23S64: "-target-feature" "+svpbmt"

// RUN: %clang --target=riscv32 -### -c %s 2>&1 -march=rvm23u32 \
// RUN: %clang --target=riscv32 -### -c %s 2>&1 -march=rvm23u32 -menable-experimental-extensions \
// RUN: | FileCheck -check-prefix=RVM23U32 %s
// RVM23U32: "-target-feature" "+m"
// RVM23U32: "-target-feature" "+zicbop"
Expand Down Expand Up @@ -322,3 +322,7 @@

// RUN: not %clang --target=riscv64 -### -c %s 2>&1 -march=rva22u64zfa | FileCheck -check-prefix=INVALID-ADDITIONAL %s
// INVALID-ADDITIONAL: error: invalid arch name 'rva22u64zfa', additional extensions must be after separator '_'

// RUN: not %clang --target=riscv64 -### -c %s 2>&1 -march=rva23u64 | FileCheck -check-prefix=EXPERIMENTAL-NOFLAG %s
// EXPERIMENTAL-NOFLAG: error: invalid arch name 'rva23u64'
// EXPERIMENTAL-NOFLAG: requires '-menable-experimental-extensions' for profile 'rva23u64'
14 changes: 9 additions & 5 deletions llvm/lib/Target/RISCV/RISCVProfiles.td
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Expand Up @@ -13,6 +13,10 @@ class RISCVProfile<string name, list<SubtargetFeature> features>
// experimental.
bit Experimental = false;
}
class RISCVExperimentalProfile<string name, list<SubtargetFeature> features>
: RISCVProfile<"experimental-"#name, features> {
let Experimental = true;
}

defvar RVI20U32Features = [Feature32Bit, FeatureStdExtI];
defvar RVI20U64Features = [Feature64Bit, FeatureStdExtI];
Expand Down Expand Up @@ -201,8 +205,8 @@ def RVA20U64 : RISCVProfile<"rva20u64", RVA20U64Features>;
def RVA20S64 : RISCVProfile<"rva20s64", RVA20S64Features>;
def RVA22U64 : RISCVProfile<"rva22u64", RVA22U64Features>;
def RVA22S64 : RISCVProfile<"rva22s64", RVA22S64Features>;
def RVA23U64 : RISCVProfile<"rva23u64", RVA23U64Features>;
def RVA23S64 : RISCVProfile<"rva23s64", RVA23S64Features>;
def RVB23U64 : RISCVProfile<"rvb23u64", RVB23U64Features>;
def RVB23S64 : RISCVProfile<"rvb23s64", RVB23S64Features>;
def RVM23U32 : RISCVProfile<"rvm23u32", RVM23U32Features>;
def RVA23U64 : RISCVExperimentalProfile<"rva23u64", RVA23U64Features>;
def RVA23S64 : RISCVExperimentalProfile<"rva23s64", RVA23S64Features>;
def RVB23U64 : RISCVExperimentalProfile<"rvb23u64", RVB23U64Features>;
def RVB23S64 : RISCVExperimentalProfile<"rvb23s64", RVB23S64Features>;
def RVM23U32 : RISCVExperimentalProfile<"rvm23u32", RVM23U32Features>;
29 changes: 23 additions & 6 deletions llvm/lib/TargetParser/RISCVISAInfo.cpp
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Expand Up @@ -102,6 +102,10 @@ void llvm::riscvExtensionsHelp(StringMap<StringRef> DescMap) {
for (const auto &P : SupportedProfiles)
outs().indent(4) << P.Name << "\n";

outs() << "\nExperimental Profiles\n";
for (const auto &P : SupportedExperimentalProfiles)
outs().indent(4) << P.Name << "\n";

outs() << "\nUse -march to specify the target's extension.\n"
"For example, clang -march=rv32i_v1p0\n";
}
Expand Down Expand Up @@ -608,12 +612,25 @@ RISCVISAInfo::parseArchString(StringRef Arch, bool EnableExperimentalExtension,
XLen = 64;
} else {
// Try parsing as a profile.
auto I = llvm::upper_bound(SupportedProfiles, Arch,
[](StringRef Arch, const RISCVProfile &Profile) {
return Arch < Profile.Name;
});

if (I != std::begin(SupportedProfiles) && Arch.starts_with((--I)->Name)) {
auto ProfileCmp = [](StringRef Arch, const RISCVProfile &Profile) {
return Arch < Profile.Name;
};
auto I = llvm::upper_bound(SupportedProfiles, Arch, ProfileCmp);
bool FoundProfile = I != std::begin(SupportedProfiles) &&
Arch.starts_with(std::prev(I)->Name);
if (!FoundProfile) {
I = llvm::upper_bound(SupportedExperimentalProfiles, Arch, ProfileCmp);
FoundProfile = (I != std::begin(SupportedExperimentalProfiles) &&
Arch.starts_with(std::prev(I)->Name));
if (FoundProfile && !EnableExperimentalExtension) {
return createStringError(errc::invalid_argument,
"requires '-menable-experimental-extensions' "
"for profile '" +
std::prev(I)->Name + "'");
}
}
if (FoundProfile) {
--I;
std::string NewArch = I->MArch.str();
StringRef ArchWithoutProfile = Arch.drop_front(I->Name.size());
if (!ArchWithoutProfile.empty()) {
Expand Down
10 changes: 5 additions & 5 deletions llvm/test/CodeGen/RISCV/attributes.ll
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Expand Up @@ -265,11 +265,11 @@
; RUN: llc -mtriple=riscv64 -mattr=+rva20s64 %s -o - | FileCheck --check-prefix=RVA20S64 %s
; RUN: llc -mtriple=riscv64 -mattr=+rva22u64 %s -o - | FileCheck --check-prefix=RVA22U64 %s
; RUN: llc -mtriple=riscv64 -mattr=+rva22s64 %s -o - | FileCheck --check-prefix=RVA22S64 %s
; RUN: llc -mtriple=riscv64 -mattr=+rva23u64 %s -o - | FileCheck --check-prefix=RVA23U64 %s
; RUN: llc -mtriple=riscv64 -mattr=+rva23s64 %s -o - | FileCheck --check-prefix=RVA23S64 %s
; RUN: llc -mtriple=riscv64 -mattr=+rvb23u64 %s -o - | FileCheck --check-prefix=RVB23U64 %s
; RUN: llc -mtriple=riscv64 -mattr=+rvb23s64 %s -o - | FileCheck --check-prefix=RVB23S64 %s
; RUN: llc -mtriple=riscv32 -mattr=+rvm23u32 %s -o - | FileCheck --check-prefix=RVM23U32 %s
; RUN: llc -mtriple=riscv64 -mattr=+experimental-rva23u64 %s -o - | FileCheck --check-prefix=RVA23U64 %s
; RUN: llc -mtriple=riscv64 -mattr=+experimental-rva23s64 %s -o - | FileCheck --check-prefix=RVA23S64 %s
; RUN: llc -mtriple=riscv64 -mattr=+experimental-rvb23u64 %s -o - | FileCheck --check-prefix=RVB23U64 %s
; RUN: llc -mtriple=riscv64 -mattr=+experimental-rvb23s64 %s -o - | FileCheck --check-prefix=RVB23S64 %s
; RUN: llc -mtriple=riscv32 -mattr=+experimental-rvm23u32 %s -o - | FileCheck --check-prefix=RVM23U32 %s

; CHECK: .attribute 4, 16

Expand Down
13 changes: 11 additions & 2 deletions llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
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Expand Up @@ -726,6 +726,13 @@ TEST(ParseArchString,
"duplicated standard user-level extension 'zicntr'");
}

TEST(ParseArchString,
RejectsExperimentalProfilesIfEnableExperimentalExtensionsNotSet) {
EXPECT_EQ(
toString(RISCVISAInfo::parseArchString("rva23u64", false).takeError()),
"requires '-menable-experimental-extensions' for profile 'rva23u64'");
}

TEST(ToFeatures, IIsDroppedAndExperimentalExtensionsArePrefixed) {
auto MaybeISAInfo1 =
RISCVISAInfo::parseArchString("rv64im_ztso", true, false);
Expand Down Expand Up @@ -1073,12 +1080,14 @@ Supported Profiles
rva20u64
rva22s64
rva22u64
rvi20u32
rvi20u64

Experimental Profiles
rva23s64
rva23u64
rvb23s64
rvb23u64
rvi20u32
rvi20u64
rvm23u32

Use -march to specify the target's extension.
Expand Down
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