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MIPS: Fix llvm.{min,max}num for R6 #93125

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May 23, 2024
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MIPS: Fix llvm.{min,max}num for R6 #93125

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14 changes: 10 additions & 4 deletions llvm/lib/Target/Mips/Mips32r6InstrInfo.td
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Original file line number Diff line number Diff line change
Expand Up @@ -1119,18 +1119,24 @@ def : MipsPat<(select i32:$cond, immz, i32:$f),

// llvm.fmin/fmax operations.
let AdditionalPredicates = [NotInMicroMips] in {
def : MipsPat<(fmaxnum f32:$lhs, f32:$rhs),
def : MipsPat<(fmaxnum_ieee f32:$lhs, f32:$rhs),
(MAX_S f32:$lhs, f32:$rhs)>,
ISA_MIPS32R6;
def : MipsPat<(fmaxnum f64:$lhs, f64:$rhs),
def : MipsPat<(fmaxnum_ieee f64:$lhs, f64:$rhs),
(MAX_D f64:$lhs, f64:$rhs)>,
ISA_MIPS32R6;
def : MipsPat<(fminnum f32:$lhs, f32:$rhs),
def : MipsPat<(fminnum_ieee f32:$lhs, f32:$rhs),
(MIN_S f32:$lhs, f32:$rhs)>,
ISA_MIPS32R6;
def : MipsPat<(fminnum f64:$lhs, f64:$rhs),
def : MipsPat<(fminnum_ieee f64:$lhs, f64:$rhs),
(MIN_D f64:$lhs, f64:$rhs)>,
ISA_MIPS32R6;
def : MipsPat<(f32 (fcanonicalize f32:$src)),
(MIN_S f32:$src, f32:$src)>,
ISA_MIPS32R6;
def : MipsPat<(f64 (fcanonicalize f64:$src)),
(MIN_D f64:$src, f64:$src)>,
ISA_MIPS32R6;
}

// Pseudo instructions
Expand Down
14 changes: 9 additions & 5 deletions llvm/lib/Target/Mips/MipsISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -360,11 +360,15 @@ MipsTargetLowering::MipsTargetLowering(const MipsTargetMachine &TM,

// Lower fmin and fmax operations for MIPS R6.
// Instructions are defined but never used.
if (Subtarget.hasMips32r6() || Subtarget.hasMips64r6()) {
setOperationAction(ISD::FMINNUM, MVT::f32, Legal);
setOperationAction(ISD::FMINNUM, MVT::f64, Legal);
setOperationAction(ISD::FMAXNUM, MVT::f32, Legal);
setOperationAction(ISD::FMAXNUM, MVT::f64, Legal);
if (Subtarget.hasMips32r6()) {
setOperationAction(ISD::FMINNUM_IEEE, MVT::f32, Legal);
setOperationAction(ISD::FMAXNUM_IEEE, MVT::f32, Legal);
setOperationAction(ISD::FMINNUM, MVT::f32, Expand);
setOperationAction(ISD::FMAXNUM, MVT::f32, Expand);
setOperationAction(ISD::FMINNUM_IEEE, MVT::f64, Legal);
setOperationAction(ISD::FMAXNUM_IEEE, MVT::f64, Legal);
setOperationAction(ISD::FMINNUM, MVT::f64, Expand);
setOperationAction(ISD::FMAXNUM, MVT::f64, Expand);
}

if (Subtarget.isGP64bit()) {
Expand Down
32 changes: 24 additions & 8 deletions llvm/test/CodeGen/Mips/mipsr6-minmaxnum.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -6,13 +6,17 @@
define float @mins(float %x, float %y) {
; MIPS32R6EL-LABEL: mins
; MIPS32R6EL: # %bb.0:
; MIPS32R6EL-NEXT: min.s $f0, $f14, $f14
; MIPS32R6EL-NEXT: min.s $f1, $f12, $f12
; MIPS32R6EL-NEXT: jr $ra
; MIPS32R6EL-NEXT: min.s $f0, $f12, $f14
; MIPS32R6EL-NEXT: min.s $f0, $f1, $f0
;
; MIPS64R6EL-LABEL: mins
; MIPS64R6EL: # %bb.0:
; MIPS64R6EL-NEXT: min.s $f0, $f13, $f13
; MIPS64R6EL-NEXT: min.s $f1, $f12, $f12
; MIPS64R6EL-NEXT: jr $ra
; MIPS64R6EL-NEXT: min.s $f0, $f12, $f13
; MIPS64R6EL-NEXT: min.s $f0, $f1, $f0

%r = tail call float @llvm.minnum.f32(float %x, float %y)
ret float %r
Expand All @@ -21,13 +25,17 @@ define float @mins(float %x, float %y) {
define float @maxs(float %x, float %y) {
; MIPS32R6EL-LABEL: maxs
; MIPS32R6EL: # %bb.0:
; MIPS32R6EL-NEXT: min.s $f0, $f14, $f14
; MIPS32R6EL-NEXT: min.s $f1, $f12, $f12
; MIPS32R6EL-NEXT: jr $ra
; MIPS32R6EL-NEXT: max.s $f0, $f12, $f14
; MIPS32R6EL-NEXT: max.s $f0, $f1, $f0
;
; MIPS64R6EL-LABEL: maxs
; MIPS64R6EL: # %bb.0:
; MIPS64R6EL-NEXT: min.s $f0, $f13, $f13
; MIPS64R6EL-NEXT: min.s $f1, $f12, $f12
; MIPS64R6EL-NEXT: jr $ra
; MIPS64R6EL-NEXT: max.s $f0, $f12, $f13
; MIPS64R6EL-NEXT: max.s $f0, $f1, $f0

%r = tail call float @llvm.maxnum.f32(float %x, float %y)
ret float %r
Expand All @@ -36,13 +44,17 @@ define float @maxs(float %x, float %y) {
define double @mind(double %x, double %y) {
; MIPS32R6EL-LABEL: mind
; MIPS32R6EL: # %bb.0:
; MIPS32R6EL-NEXT: min.d $f0, $f14, $f14
; MIPS32R6EL-NEXT: min.d $f1, $f12, $f12
; MIPS32R6EL-NEXT: jr $ra
; MIPS32R6EL-NEXT: min.d $f0, $f12, $f14
; MIPS32R6EL-NEXT: min.d $f0, $f1, $f0
;
; MIPS64R6EL-LABEL: mind
; MIPS64R6EL: # %bb.0:
; MIPS64R6EL-NEXT: min.d $f0, $f13, $f13
; MIPS64R6EL-NEXT: min.d $f1, $f12, $f12
; MIPS64R6EL-NEXT: jr $ra
; MIPS64R6EL-NEXT: min.d $f0, $f12, $f13
; MIPS64R6EL-NEXT: min.d $f0, $f1, $f0

%r = tail call double @llvm.minnum.f64(double %x, double %y)
ret double %r
Expand All @@ -51,13 +63,17 @@ define double @mind(double %x, double %y) {
define double @maxd(double %x, double %y) {
; MIPS32R6EL-LABEL: maxd
; MIPS32R6EL: # %bb.0:
; MIPS32R6EL-NEXT: min.d $f0, $f14, $f14
; MIPS32R6EL-NEXT: min.d $f1, $f12, $f12
; MIPS32R6EL-NEXT: jr $ra
; MIPS32R6EL-NEXT: max.d $f0, $f12, $f14
; MIPS32R6EL-NEXT: max.d $f0, $f1, $f0
;
; MIPS64R6EL-LABEL: maxd
; MIPS64R6EL: # %bb.0:
; MIPS64R6EL-NEXT: min.d $f0, $f13, $f13
; MIPS64R6EL-NEXT: min.d $f1, $f12, $f12
; MIPS64R6EL-NEXT: jr $ra
; MIPS64R6EL-NEXT: max.d $f0, $f12, $f13
; MIPS64R6EL-NEXT: max.d $f0, $f1, $f0

%r = tail call double @llvm.maxnum.f64(double %x, double %y)
ret double %r
Expand Down
73 changes: 39 additions & 34 deletions llvm/test/CodeGen/Mips/msa/f16-llvm-ir.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -2466,13 +2466,14 @@ define void @fminnum(float %b) {
; MIPSR6-O32-NEXT: lui $2, %hi(_gp_disp)
; MIPSR6-O32-NEXT: addiu $2, $2, %lo(_gp_disp)
; MIPSR6-O32-NEXT: addu $1, $2, $25
; MIPSR6-O32-NEXT: min.s $f0, $f12, $f12
; MIPSR6-O32-NEXT: lw $1, %got(g)($1)
; MIPSR6-O32-NEXT: lh $2, 0($1)
; MIPSR6-O32-NEXT: fill.h $w0, $2
; MIPSR6-O32-NEXT: fexupr.w $w0, $w0
; MIPSR6-O32-NEXT: copy_s.w $2, $w0[0]
; MIPSR6-O32-NEXT: mtc1 $2, $f0
; MIPSR6-O32-NEXT: min.s $f0, $f0, $f12
; MIPSR6-O32-NEXT: fill.h $w1, $2
; MIPSR6-O32-NEXT: fexupr.w $w1, $w1
; MIPSR6-O32-NEXT: copy_s.w $2, $w1[0]
; MIPSR6-O32-NEXT: mtc1 $2, $f1
; MIPSR6-O32-NEXT: min.s $f0, $f1, $f0
; MIPSR6-O32-NEXT: mfc1 $2, $f0
; MIPSR6-O32-NEXT: fill.w $w0, $2
; MIPSR6-O32-NEXT: fexdo.h $w0, $w0, $w0
Expand All @@ -2485,13 +2486,14 @@ define void @fminnum(float %b) {
; MIPSR6-N32-NEXT: lui $1, %hi(%neg(%gp_rel(fminnum)))
; MIPSR6-N32-NEXT: addu $1, $1, $25
; MIPSR6-N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(fminnum)))
; MIPSR6-N32-NEXT: min.s $f0, $f12, $f12
; MIPSR6-N32-NEXT: lw $1, %got_disp(g)($1)
; MIPSR6-N32-NEXT: lh $2, 0($1)
; MIPSR6-N32-NEXT: fill.h $w0, $2
; MIPSR6-N32-NEXT: fexupr.w $w0, $w0
; MIPSR6-N32-NEXT: copy_s.w $2, $w0[0]
; MIPSR6-N32-NEXT: mtc1 $2, $f0
; MIPSR6-N32-NEXT: min.s $f0, $f0, $f12
; MIPSR6-N32-NEXT: fill.h $w1, $2
; MIPSR6-N32-NEXT: fexupr.w $w1, $w1
; MIPSR6-N32-NEXT: copy_s.w $2, $w1[0]
; MIPSR6-N32-NEXT: mtc1 $2, $f1
; MIPSR6-N32-NEXT: min.s $f0, $f1, $f0
; MIPSR6-N32-NEXT: mfc1 $2, $f0
; MIPSR6-N32-NEXT: fill.w $w0, $2
; MIPSR6-N32-NEXT: fexdo.h $w0, $w0, $w0
Expand All @@ -2504,20 +2506,20 @@ define void @fminnum(float %b) {
; MIPSR6-N64-NEXT: lui $1, %hi(%neg(%gp_rel(fminnum)))
; MIPSR6-N64-NEXT: daddu $1, $1, $25
; MIPSR6-N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(fminnum)))
; MIPSR6-N64-NEXT: min.s $f0, $f12, $f12
; MIPSR6-N64-NEXT: ld $1, %got_disp(g)($1)
; MIPSR6-N64-NEXT: lh $2, 0($1)
; MIPSR6-N64-NEXT: fill.h $w0, $2
; MIPSR6-N64-NEXT: fexupr.w $w0, $w0
; MIPSR6-N64-NEXT: copy_s.w $2, $w0[0]
; MIPSR6-N64-NEXT: mtc1 $2, $f0
; MIPSR6-N64-NEXT: min.s $f0, $f0, $f12
; MIPSR6-N64-NEXT: fill.h $w1, $2
; MIPSR6-N64-NEXT: fexupr.w $w1, $w1
; MIPSR6-N64-NEXT: copy_s.w $2, $w1[0]
; MIPSR6-N64-NEXT: mtc1 $2, $f1
; MIPSR6-N64-NEXT: min.s $f0, $f1, $f0
; MIPSR6-N64-NEXT: mfc1 $2, $f0
; MIPSR6-N64-NEXT: fill.w $w0, $2
; MIPSR6-N64-NEXT: fexdo.h $w0, $w0, $w0
; MIPSR6-N64-NEXT: copy_u.h $2, $w0[0]
; MIPSR6-N64-NEXT: jr $ra
; MIPSR6-N64-NEXT: sh $2, 0($1)
;
entry:
%0 = load i16, ptr @g, align 2
%1 = call float @llvm.convert.from.fp16.f32(i16 %0)
Expand Down Expand Up @@ -2632,17 +2634,18 @@ define void @fmaxnum(float %b) {
; MIPS64R5-N64-NEXT: daddiu $sp, $sp, 32
;
; MIPSR6-O32-LABEL: fmaxnum:
; MIPSR6-O32: # %bb.0:
; MIPSR6-O32: # %bb.0: # %entry
; MIPSR6-O32-NEXT: lui $2, %hi(_gp_disp)
; MIPSR6-O32-NEXT: addiu $2, $2, %lo(_gp_disp)
; MIPSR6-O32-NEXT: addu $1, $2, $25
; MIPSR6-O32-NEXT: min.s $f0, $f12, $f12
; MIPSR6-O32-NEXT: lw $1, %got(g)($1)
; MIPSR6-O32-NEXT: lh $2, 0($1)
; MIPSR6-O32-NEXT: fill.h $w0, $2
; MIPSR6-O32-NEXT: fexupr.w $w0, $w0
; MIPSR6-O32-NEXT: copy_s.w $2, $w0[0]
; MIPSR6-O32-NEXT: mtc1 $2, $f0
; MIPSR6-O32-NEXT: max.s $f0, $f0, $f12
; MIPSR6-O32-NEXT: fill.h $w1, $2
; MIPSR6-O32-NEXT: fexupr.w $w1, $w1
; MIPSR6-O32-NEXT: copy_s.w $2, $w1[0]
; MIPSR6-O32-NEXT: mtc1 $2, $f1
; MIPSR6-O32-NEXT: max.s $f0, $f1, $f0
; MIPSR6-O32-NEXT: mfc1 $2, $f0
; MIPSR6-O32-NEXT: fill.w $w0, $2
; MIPSR6-O32-NEXT: fexdo.h $w0, $w0, $w0
Expand All @@ -2651,17 +2654,18 @@ define void @fmaxnum(float %b) {
; MIPSR6-O32-NEXT: sh $2, 0($1)
;
; MIPSR6-N32-LABEL: fmaxnum:
; MIPSR6-N32: # %bb.0:
; MIPSR6-N32: # %bb.0: # %entry
; MIPSR6-N32-NEXT: lui $1, %hi(%neg(%gp_rel(fmaxnum)))
; MIPSR6-N32-NEXT: addu $1, $1, $25
; MIPSR6-N32-NEXT: addiu $1, $1, %lo(%neg(%gp_rel(fmaxnum)))
; MIPSR6-N32-NEXT: min.s $f0, $f12, $f12
; MIPSR6-N32-NEXT: lw $1, %got_disp(g)($1)
; MIPSR6-N32-NEXT: lh $2, 0($1)
; MIPSR6-N32-NEXT: fill.h $w0, $2
; MIPSR6-N32-NEXT: fexupr.w $w0, $w0
; MIPSR6-N32-NEXT: copy_s.w $2, $w0[0]
; MIPSR6-N32-NEXT: mtc1 $2, $f0
; MIPSR6-N32-NEXT: max.s $f0, $f0, $f12
; MIPSR6-N32-NEXT: fill.h $w1, $2
; MIPSR6-N32-NEXT: fexupr.w $w1, $w1
; MIPSR6-N32-NEXT: copy_s.w $2, $w1[0]
; MIPSR6-N32-NEXT: mtc1 $2, $f1
; MIPSR6-N32-NEXT: max.s $f0, $f1, $f0
; MIPSR6-N32-NEXT: mfc1 $2, $f0
; MIPSR6-N32-NEXT: fill.w $w0, $2
; MIPSR6-N32-NEXT: fexdo.h $w0, $w0, $w0
Expand All @@ -2670,17 +2674,18 @@ define void @fmaxnum(float %b) {
; MIPSR6-N32-NEXT: sh $2, 0($1)
;
; MIPSR6-N64-LABEL: fmaxnum:
; MIPSR6-N64: # %bb.0:
; MIPSR6-N64: # %bb.0: # %entry
; MIPSR6-N64-NEXT: lui $1, %hi(%neg(%gp_rel(fmaxnum)))
; MIPSR6-N64-NEXT: daddu $1, $1, $25
; MIPSR6-N64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(fmaxnum)))
; MIPSR6-N64-NEXT: min.s $f0, $f12, $f12
; MIPSR6-N64-NEXT: ld $1, %got_disp(g)($1)
; MIPSR6-N64-NEXT: lh $2, 0($1)
; MIPSR6-N64-NEXT: fill.h $w0, $2
; MIPSR6-N64-NEXT: fexupr.w $w0, $w0
; MIPSR6-N64-NEXT: copy_s.w $2, $w0[0]
; MIPSR6-N64-NEXT: mtc1 $2, $f0
; MIPSR6-N64-NEXT: max.s $f0, $f0, $f12
; MIPSR6-N64-NEXT: fill.h $w1, $2
; MIPSR6-N64-NEXT: fexupr.w $w1, $w1
; MIPSR6-N64-NEXT: copy_s.w $2, $w1[0]
; MIPSR6-N64-NEXT: mtc1 $2, $f1
; MIPSR6-N64-NEXT: max.s $f0, $f1, $f0
; MIPSR6-N64-NEXT: mfc1 $2, $f0
; MIPSR6-N64-NEXT: fill.w $w0, $2
; MIPSR6-N64-NEXT: fexdo.h $w0, $w0, $w0
Expand Down
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