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MCExpr-ify AMDGPU PALMetadata #93236

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48 changes: 28 additions & 20 deletions llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -29,6 +29,7 @@
#include "TargetInfo/AMDGPUTargetInfo.h"
#include "Utils/AMDGPUBaseInfo.h"
#include "Utils/AMDKernelCodeTUtils.h"
#include "Utils/SIDefinesUtils.h"
#include "llvm/Analysis/OptimizationRemarkEmitter.h"
#include "llvm/BinaryFormat/ELF.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
Expand Down Expand Up @@ -1207,41 +1208,49 @@ void AMDGPUAsmPrinter::EmitPALMetadata(const MachineFunction &MF,
auto &Ctx = MF.getContext();

MD->setEntryPoint(CC, MF.getFunction().getName());
MD->setNumUsedVgprs(
CC, getMCExprValue(CurrentProgramInfo.NumVGPRsForWavesPerEU, Ctx));
MD->setNumUsedVgprs(CC, CurrentProgramInfo.NumVGPRsForWavesPerEU, Ctx);

// Only set AGPRs for supported devices
const GCNSubtarget &STM = MF.getSubtarget<GCNSubtarget>();
if (STM.hasMAIInsts()) {
MD->setNumUsedAgprs(CC, getMCExprValue(CurrentProgramInfo.NumAccVGPR, Ctx));
MD->setNumUsedAgprs(CC, CurrentProgramInfo.NumAccVGPR);
}

MD->setNumUsedSgprs(
CC, getMCExprValue(CurrentProgramInfo.NumSGPRsForWavesPerEU, Ctx));
MD->setNumUsedSgprs(CC, CurrentProgramInfo.NumSGPRsForWavesPerEU, Ctx);
if (MD->getPALMajorVersion() < 3) {
MD->setRsrc1(CC, CurrentProgramInfo.getPGMRSrc1(CC, STM));
MD->setRsrc1(CC, CurrentProgramInfo.getPGMRSrc1(CC, STM, Ctx), Ctx);
if (AMDGPU::isCompute(CC)) {
MD->setRsrc2(CC, CurrentProgramInfo.getComputePGMRSrc2());
MD->setRsrc2(CC, CurrentProgramInfo.getComputePGMRSrc2(Ctx), Ctx);
} else {
if (getMCExprValue(CurrentProgramInfo.ScratchBlocks, Ctx) > 0)
MD->setRsrc2(CC, S_00B84C_SCRATCH_EN(1));
const MCExpr *HasScratchBlocks =
MCBinaryExpr::createGT(CurrentProgramInfo.ScratchBlocks,
MCConstantExpr::create(0, Ctx), Ctx);
auto [Shift, Mask] = getShiftMask(C_00B84C_SCRATCH_EN);
MD->setRsrc2(CC, maskShiftSet(HasScratchBlocks, Mask, Shift, Ctx), Ctx);
}
} else {
MD->setHwStage(CC, ".debug_mode", (bool)CurrentProgramInfo.DebugMode);
MD->setHwStage(CC, ".scratch_en",
(bool)getMCExprValue(CurrentProgramInfo.ScratchEnable, Ctx));
MD->setHwStage(CC, ".scratch_en", msgpack::Type::Boolean,
CurrentProgramInfo.ScratchEnable);
EmitPALMetadataCommon(MD, CurrentProgramInfo, CC, STM);
}

// ScratchSize is in bytes, 16 aligned.
MD->setScratchSize(
CC, alignTo(getMCExprValue(CurrentProgramInfo.ScratchSize, Ctx), 16));
CC,
AMDGPUVariadicMCExpr::createAlignTo(CurrentProgramInfo.ScratchSize,
MCConstantExpr::create(16, Ctx), Ctx),
Ctx);

if (MF.getFunction().getCallingConv() == CallingConv::AMDGPU_PS) {
unsigned ExtraLDSSize = STM.getGeneration() >= AMDGPUSubtarget::GFX11
? divideCeil(CurrentProgramInfo.LDSBlocks, 2)
: CurrentProgramInfo.LDSBlocks;
if (MD->getPALMajorVersion() < 3) {
MD->setRsrc2(CC, S_00B02C_EXTRA_LDS_SIZE(ExtraLDSSize));
MD->setRsrc2(
CC,
MCConstantExpr::create(S_00B02C_EXTRA_LDS_SIZE(ExtraLDSSize), Ctx),
Ctx);
MD->setSpiPsInputEna(MFI->getPSInputEnable());
MD->setSpiPsInputAddr(MFI->getPSInputAddr());
} else {
Expand Down Expand Up @@ -1288,20 +1297,19 @@ void AMDGPUAsmPrinter::emitPALFunctionMetadata(const MachineFunction &MF) {

if (MD->getPALMajorVersion() < 3) {
// Set compute registers
MD->setRsrc1(CallingConv::AMDGPU_CS,
CurrentProgramInfo.getPGMRSrc1(CallingConv::AMDGPU_CS, ST));
MD->setRsrc1(
CallingConv::AMDGPU_CS,
CurrentProgramInfo.getPGMRSrc1(CallingConv::AMDGPU_CS, ST, Ctx), Ctx);
MD->setRsrc2(CallingConv::AMDGPU_CS,
CurrentProgramInfo.getComputePGMRSrc2());
CurrentProgramInfo.getComputePGMRSrc2(Ctx), Ctx);
} else {
EmitPALMetadataCommon(MD, CurrentProgramInfo, CallingConv::AMDGPU_CS, ST);
}

// Set optional info
MD->setFunctionLdsSize(FnName, CurrentProgramInfo.LDSSize);
MD->setFunctionNumUsedVgprs(
FnName, getMCExprValue(CurrentProgramInfo.NumVGPRsForWavesPerEU, Ctx));
MD->setFunctionNumUsedSgprs(
FnName, getMCExprValue(CurrentProgramInfo.NumSGPRsForWavesPerEU, Ctx));
MD->setFunctionNumUsedVgprs(FnName, CurrentProgramInfo.NumVGPRsForWavesPerEU);
MD->setFunctionNumUsedSgprs(FnName, CurrentProgramInfo.NumSGPRsForWavesPerEU);
}

// This is supposed to be log2(Size)
Expand Down
61 changes: 61 additions & 0 deletions llvm/lib/Target/AMDGPU/Utils/AMDGPUDelayedMCExpr.cpp
Original file line number Diff line number Diff line change
@@ -0,0 +1,61 @@
//===- AMDGPUDelayedMCExpr.cpp - Delayed MCExpr resolve ---------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//

#include "AMDGPUDelayedMCExpr.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCValue.h"

using namespace llvm;

static msgpack::DocNode getNode(msgpack::DocNode DN, msgpack::Type Type,
MCValue Val) {
msgpack::Document *Doc = DN.getDocument();
switch (Type) {
default:
return Doc->getEmptyNode();
case msgpack::Type::Int:
return Doc->getNode(static_cast<int64_t>(Val.getConstant()));
case msgpack::Type::UInt:
return Doc->getNode(static_cast<uint64_t>(Val.getConstant()));
case msgpack::Type::Boolean:
return Doc->getNode(static_cast<bool>(Val.getConstant()));
}
}

void DelayedMCExprs::assignDocNode(msgpack::DocNode &DN, msgpack::Type Type,
const MCExpr *ExprValue) {
MCValue Res;
if (ExprValue->evaluateAsRelocatable(Res, nullptr, nullptr)) {
if (Res.isAbsolute()) {
DN = getNode(DN, Type, Res);
return;
}
}

DelayedExprs.push_back(Expr{DN, Type, ExprValue});
}

bool DelayedMCExprs::resolveDelayedExpressions() {
while (!DelayedExprs.empty()) {
Expr DE = DelayedExprs.front();
MCValue Res;

if (!DE.ExprValue->evaluateAsRelocatable(Res, nullptr, nullptr) ||
!Res.isAbsolute())
return false;

DelayedExprs.pop_front();
DE.DN = getNode(DE.DN, DE.Type, Res);
}

return true;
}

void DelayedMCExprs::clear() { DelayedExprs.clear(); }

bool DelayedMCExprs::empty() { return DelayedExprs.empty(); }
39 changes: 39 additions & 0 deletions llvm/lib/Target/AMDGPU/Utils/AMDGPUDelayedMCExpr.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,39 @@
//===- AMDGPUDelayedMCExpr.h - Delayed MCExpr resolve -----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//

#ifndef LLVM_LIB_TARGET_AMDGPU_UTILS_AMDGPUDELAYEDMCEXPR_H
#define LLVM_LIB_TARGET_AMDGPU_UTILS_AMDGPUDELAYEDMCEXPR_H

#include "llvm/BinaryFormat/MsgPackDocument.h"
#include <deque>

namespace llvm {
class MCExpr;

class DelayedMCExprs {
struct Expr {
msgpack::DocNode &DN;
msgpack::Type Type;
const MCExpr *ExprValue;
Expr(msgpack::DocNode &DN, msgpack::Type Type, const MCExpr *ExprValue)
: DN(DN), Type(Type), ExprValue(ExprValue) {}
};

std::deque<Expr> DelayedExprs;

public:
bool resolveDelayedExpressions();
void assignDocNode(msgpack::DocNode &DN, msgpack::Type Type,
const MCExpr *ExprValue);
void clear();
bool empty();
};

} // end namespace llvm

#endif // LLVM_LIB_TARGET_AMDGPU_UTILS_AMDGPUDELAYEDMCEXPR_H
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