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[mlir][test] Rename Vector integration tests for CPU (nfc) #93521

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Merged
merged 2 commits into from
May 30, 2024

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banach-space
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@banach-space banach-space commented May 28, 2024

To keep the test filenames consistent, this patch:

  • removes "test-" from file names (there used to be a mix of
    "test-feature-1.mlir" and "feature-2.mlir"),
  • replaces "_" with "-" (there used to be a mix of "feature-3.mlir"
    and "feature_4.mlir").

Only files under test/Integration/Dialect/Vector/CPU are updated.

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llvmbot commented May 28, 2024

@llvm/pr-subscribers-mlir-amx
@llvm/pr-subscribers-mlir-sme
@llvm/pr-subscribers-mlir-vector

@llvm/pr-subscribers-mlir-sve

Author: Andrzej Warzyński (banach-space)

Changes

To keep the test filenames consistent,

  • removes "test-" from file names (there used to be a mix of
    "test-feature-1.mlir" and "feature-2.mlir"),
  • replaces "_" with "-" (there used to be a mix of "feature-3.mlir"
    and "feature_4.mlir").

Full diff: https://github.com/llvm/llvm-project/pull/93521.diff

14 Files Affected:

  • (renamed) mlir/test/Integration/Dialect/Vector/CPU/ArmSME/load-vertical.mlir ()
  • (renamed) mlir/test/Integration/Dialect/Vector/CPU/ArmSME/multi-tile-transpose.mlir ()
  • (renamed) mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f16f16f32.mlir ()
  • (renamed) mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f32.mlir ()
  • (renamed) mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f64.mlir ()
  • (renamed) mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-i8i8i32.mlir ()
  • (renamed) mlir/test/Integration/Dialect/Vector/CPU/ArmSME/ssve.mlir ()
  • (renamed) mlir/test/Integration/Dialect/Vector/CPU/ArmSME/tile-fill.mlir ()
  • (renamed) mlir/test/Integration/Dialect/Vector/CPU/ArmSME/transfer-read-2d.mlir ()
  • (renamed) mlir/test/Integration/Dialect/Vector/CPU/ArmSME/transfer-write-2d.mlir ()
  • (renamed) mlir/test/Integration/Dialect/Vector/CPU/ArmSME/transpose.mlir ()
  • (renamed) mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/contraction.mlir ()
  • (renamed) mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/scalable-interleave.mlir ()
  • (renamed) mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/sve.mlir ()
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-load-vertical.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/load-vertical.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-load-vertical.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/ArmSME/load-vertical.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-multi-tile-transpose.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/multi-tile-transpose.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-multi-tile-transpose.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/ArmSME/multi-tile-transpose.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f16f16f32.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f16f16f32.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f16f16f32.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f16f16f32.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f32.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f32.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f32.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f32.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f64.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f64.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f64.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f64.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-i8i8i32.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-i8i8i32.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-i8i8i32.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-i8i8i32.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-ssve.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/ssve.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-ssve.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/ArmSME/ssve.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/tile_fill.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/tile-fill.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/ArmSME/tile_fill.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/ArmSME/tile-fill.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-read-2d.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/transfer-read-2d.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-read-2d.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/ArmSME/transfer-read-2d.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-write-2d.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/transfer-write-2d.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-write-2d.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/ArmSME/transfer-write-2d.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transpose.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/transpose.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transpose.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/ArmSME/transpose.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/test-contraction.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/contraction.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/test-contraction.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/contraction.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/test-scalable-interleave.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/scalable-interleave.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/test-scalable-interleave.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/scalable-interleave.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/test-sve.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/sve.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/test-sve.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/sve.mlir

@llvmbot
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llvmbot commented May 28, 2024

@llvm/pr-subscribers-mlir

Author: Andrzej Warzyński (banach-space)

Changes

To keep the test filenames consistent,

  • removes "test-" from file names (there used to be a mix of
    "test-feature-1.mlir" and "feature-2.mlir"),
  • replaces "_" with "-" (there used to be a mix of "feature-3.mlir"
    and "feature_4.mlir").

Full diff: https://github.com/llvm/llvm-project/pull/93521.diff

14 Files Affected:

  • (renamed) mlir/test/Integration/Dialect/Vector/CPU/ArmSME/load-vertical.mlir ()
  • (renamed) mlir/test/Integration/Dialect/Vector/CPU/ArmSME/multi-tile-transpose.mlir ()
  • (renamed) mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f16f16f32.mlir ()
  • (renamed) mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f32.mlir ()
  • (renamed) mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f64.mlir ()
  • (renamed) mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-i8i8i32.mlir ()
  • (renamed) mlir/test/Integration/Dialect/Vector/CPU/ArmSME/ssve.mlir ()
  • (renamed) mlir/test/Integration/Dialect/Vector/CPU/ArmSME/tile-fill.mlir ()
  • (renamed) mlir/test/Integration/Dialect/Vector/CPU/ArmSME/transfer-read-2d.mlir ()
  • (renamed) mlir/test/Integration/Dialect/Vector/CPU/ArmSME/transfer-write-2d.mlir ()
  • (renamed) mlir/test/Integration/Dialect/Vector/CPU/ArmSME/transpose.mlir ()
  • (renamed) mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/contraction.mlir ()
  • (renamed) mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/scalable-interleave.mlir ()
  • (renamed) mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/sve.mlir ()
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-load-vertical.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/load-vertical.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-load-vertical.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/ArmSME/load-vertical.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-multi-tile-transpose.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/multi-tile-transpose.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-multi-tile-transpose.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/ArmSME/multi-tile-transpose.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f16f16f32.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f16f16f32.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f16f16f32.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f16f16f32.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f32.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f32.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f32.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f32.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f64.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f64.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f64.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f64.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-i8i8i32.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-i8i8i32.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-i8i8i32.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-i8i8i32.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-ssve.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/ssve.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-ssve.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/ArmSME/ssve.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/tile_fill.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/tile-fill.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/ArmSME/tile_fill.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/ArmSME/tile-fill.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-read-2d.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/transfer-read-2d.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-read-2d.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/ArmSME/transfer-read-2d.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-write-2d.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/transfer-write-2d.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-write-2d.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/ArmSME/transfer-write-2d.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transpose.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/transpose.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transpose.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/ArmSME/transpose.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/test-contraction.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/contraction.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/test-contraction.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/contraction.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/test-scalable-interleave.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/scalable-interleave.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/test-scalable-interleave.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/scalable-interleave.mlir
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/test-sve.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/sve.mlir
similarity index 100%
rename from mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/test-sve.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/sve.mlir

@banach-space banach-space force-pushed the andrzej/rename_test_files branch from 76e9987 to 818bd44 Compare May 28, 2024 09:41
@banach-space banach-space requested a review from c-rhodes May 28, 2024 09:41
@c-rhodes
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For SME the early integration tests I added like tile_fill.mlir didn't have the test- prefix but once I realised the target agnostic Vector dialect integration tests have that prefix I started adding it for consistency. I have no strong preference either way but consistency would be good.

@MacDue
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MacDue commented May 28, 2024

Unless we want to change the vector dialect tests too, I think it'd be easier to be consistent with the vector tests.

@banach-space
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Thanks for taking a look!

Consistency is important, I agree. Re tests in "mlir/test/Integration/Dialect/Vector/CPU/", I suggest renaming those tests as well.

IMHO, adding "test-" to filenames inside a test directory is noise that can be avoided. The information that these files are test files is already encoded in the directory name - no need to repeat that in the filename.

@c-rhodes
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Thanks for taking a look!

Consistency is important, I agree. Re tests in "mlir/test/Integration/Dialect/Vector/CPU/", I suggest renaming those tests as well.

👍

~40% of the integration tests (118/303) have the prefix, not sure how far you want to take it.

IMHO, adding "test-" to filenames inside a test directory is noise that can be avoided. The information that these files are test files is already encoded in the directory name - no need to repeat that in the filename.

I agree.

@banach-space banach-space requested a review from aartbik as a code owner May 29, 2024 18:39
@banach-space banach-space changed the title [mlir][test] Rename SVE + SME integration tests (nfc) [mlir][test] Rename Vector integration tests for CPU (nfc) May 29, 2024
To keep the test filenames consistent,
  * removes "test-" from  file names (there used to be a mix of
    "test-feature-1.mlir" and "feature-2.mlir"),
  * replaces "_" with "-" (there used to be a mix of "feature-3.mlir"
    and "feature_4.mlir").
Rename the remaining Vector (CPU) files
@banach-space banach-space force-pushed the andrzej/rename_test_files branch from 46a5556 to 336b20c Compare May 30, 2024 12:24
@banach-space banach-space merged commit 435114f into llvm:main May 30, 2024
7 checks passed
@banach-space banach-space deleted the andrzej/rename_test_files branch May 31, 2024 07:16
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4 participants