Skip to content

[SPARC][IAS] Add support for prefetcha instruction #94250

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 4 commits into from
Jun 9, 2024
Merged

[SPARC][IAS] Add support for prefetcha instruction #94250

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
4 commits
Select commit Hold shift + click to select a range
bd83bfb
[𝘀𝗽𝗿] changes to main this commit is based on
koachan Jun 3, 2024
0432fbf
[𝘀𝗽𝗿] initial version
koachan Jun 3, 2024
69d2636
[𝘀𝗽𝗿] changes introduced through rebase
koachan Jun 9, 2024
c40df78
Update/fix spr errors
koachan Jun 9, 2024
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
7 changes: 7 additions & 0 deletions llvm/lib/Target/Sparc/SparcInstrInfo.td
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -1782,6 +1782,13 @@ let Predicates = [HasV9] in {
def PREFETCHi : F3_2<3, 0b101101,
(outs), (ins (MEMri $rs1, $simm13):$addr, PrefetchTag:$rd),
"prefetch [$addr], $rd", []>;
def PREFETCHAr : F3_1_asi<3, 0b111101, (outs),
(ins (MEMrr $rs1, $rs2):$addr, ASITag:$asi, PrefetchTag:$rd),
"prefetcha [$addr] $asi, $rd", []>;
let Uses = [ASR3] in
def PREFETCHAi : F3_2<3, 0b111101, (outs),
(ins (MEMri $rs1, $simm13):$addr, PrefetchTag:$rd),
"prefetcha [$addr] %asi, $rd", []>;
}


Expand Down
5 changes: 5 additions & 0 deletions llvm/test/MC/Disassembler/Sparc/sparc-v9-asi.txt
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -32,3 +32,8 @@
0xd5 0xf6 0x11 0x56
# V9: casxa [%i0] #ASI_SNF_L, %l6, %o2
0xd5 0xf6 0x11 0x76

# V9: prefetcha [%i1+3968] %asi, #one_read
0xc3 0xee 0x6f 0x80
# V9: prefetcha [%i1+%i2] #ASI_SNF, #one_read
0xc3 0xee 0x50 0x7a
30 changes: 30 additions & 0 deletions llvm/test/MC/Sparc/sparcv9-instructions.s
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -647,6 +647,36 @@
! V9: prefetch [%i1+%i2], #one_write_strong ! encoding: [0xef,0x6e,0x40,0x1a]
prefetch [ %i1 + %i2 ], #one_write_strong

! V8: error: malformed ASI tag, must be a constant integer expression
! V8-NEXT: prefetcha [ %i1 + 0xf80 ] %asi, 1
! V9: prefetcha [%i1+3968] %asi, #one_read ! encoding: [0xc3,0xee,0x6f,0x80]
prefetcha [ %i1 + 0xf80 ] %asi, 1

! V8: error: malformed ASI tag, must be a constant integer expression
! V8-NEXT: prefetcha [ %i1 + 0xf80 ] %asi, #one_read
! V9: prefetcha [%i1+3968] %asi, #one_read ! encoding: [0xc3,0xee,0x6f,0x80]
prefetcha [ %i1 + 0xf80 ] %asi, #one_read

! V8: error: malformed ASI tag, must be a constant integer expression
! V8-NEXT: prefetcha [ %i1 + %i2 ] #ASI_SNF, 1
! V9: prefetcha [%i1+%i2] #ASI_SNF, #one_read ! encoding: [0xc3,0xee,0x50,0x7a]
prefetcha [ %i1 + %i2 ] #ASI_SNF, 1

! V8: error: malformed ASI tag, must be a constant integer expression
! V8-NEXT: prefetcha [ %i1 + %i2 ] #ASI_SNF, #one_read
! V9: prefetcha [%i1+%i2] #ASI_SNF, #one_read ! encoding: [0xc3,0xee,0x50,0x7a]
prefetcha [ %i1 + %i2 ] #ASI_SNF, #one_read

! V8: error: invalid operand for instruction
! V8-NEXT: prefetcha [ %i1 + %i2 ] 131, 1
! V9: prefetcha [%i1+%i2] #ASI_SNF, #one_read ! encoding: [0xc3,0xee,0x50,0x7a]
prefetcha [ %i1 + %i2 ] 131, 1

! V8: error: unexpected token
! V8-NEXT: prefetcha [ %i1 + %i2 ] 131, #one_read
! V9: prefetcha [%i1+%i2] #ASI_SNF, #one_read ! encoding: [0xc3,0xee,0x50,0x7a]
prefetcha [ %i1 + %i2 ] 131, #one_read

! V8: error: instruction requires a CPU feature not currently enabled
! V8-NEXT: done
! V9: done ! encoding: [0x81,0xf0,0x00,0x00]
Expand Down
Loading