Skip to content

[LoongArch] Set isAsCheapAsAMove on ADDI.D and {X}ORI instructions #94733

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 2 commits into from
Jun 12, 2024
Merged

[LoongArch] Set isAsCheapAsAMove on ADDI.D and {X}ORI instructions #94733

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
2 commits
Select commit Hold shift + click to select a range
892cf0e
[LoongArch] Set isAsCheapAsAMove on ADDI.D and {X}ORI instructions
heiher May 31, 2024
af3434d
Addressing Sixweining's suggestion
heiher Jun 12, 2024
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
15 changes: 15 additions & 0 deletions llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -229,6 +229,21 @@ unsigned LoongArchInstrInfo::getInstSizeInBytes(const MachineInstr &MI) const {
return MI.getDesc().getSize();
}

bool LoongArchInstrInfo::isAsCheapAsAMove(const MachineInstr &MI) const {
const unsigned Opcode = MI.getOpcode();
switch (Opcode) {
default:
break;
case LoongArch::ADDI_D:
case LoongArch::ORI:
case LoongArch::XORI:
return (MI.getOperand(1).isReg() &&
MI.getOperand(1).getReg() == LoongArch::R0) ||
(MI.getOperand(2).isImm() && MI.getOperand(2).getImm() == 0);
}
return MI.isAsCheapAsAMove();
}

MachineBasicBlock *
LoongArchInstrInfo::getBranchDestBlock(const MachineInstr &MI) const {
assert(MI.getDesc().isBranch() && "Unexpected opcode!");
Expand Down
2 changes: 2 additions & 0 deletions llvm/lib/Target/LoongArch/LoongArchInstrInfo.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -52,6 +52,8 @@ class LoongArchInstrInfo : public LoongArchGenInstrInfo {

unsigned getInstSizeInBytes(const MachineInstr &MI) const override;

bool isAsCheapAsAMove(const MachineInstr &MI) const override;

MachineBasicBlock *getBranchDestBlock(const MachineInstr &MI) const override;

bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
Expand Down
6 changes: 4 additions & 2 deletions llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -751,7 +751,8 @@ def XOR : ALU_3R<0x00158000>;
def ANDN : ALU_3R<0x00168000>;
def ORN : ALU_3R<0x00160000>;
def ANDI : ALU_2RI12<0x03400000, uimm12>;
let isReMaterializable = 1 in {
// See LoongArchInstrInfo::isAsCheapAsAMove for more details.
let isReMaterializable = 1, isAsCheapAsAMove = 1 in {
def ORI : ALU_2RI12<0x03800000, uimm12_ori>;
def XORI : ALU_2RI12<0x03c00000, uimm12>;
}
Expand Down Expand Up @@ -858,7 +859,8 @@ def ADD_D : ALU_3R<0x00108000>;
def SUB_D : ALU_3R<0x00118000>;
// ADDI_D isn't always rematerializable, but isReMaterializable will be used as
// a hint which is verified in isReallyTriviallyReMaterializable.
let isReMaterializable = 1 in {
// See LoongArchInstrInfo::isAsCheapAsAMove for more details.
let isReMaterializable = 1, isAsCheapAsAMove = 1 in {
def ADDI_D : ALU_2RI12<0x02c00000, simm12_addlike>;
}
def ADDU16I_D : ALU_2RI16<0x10000000, simm16>;
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/LoongArch/calling-conv-lp64d.ll
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -28,9 +28,9 @@ define i64 @caller_float_in_fpr() nounwind {
; CHECK: # %bb.0:
; CHECK-NEXT: addi.d $sp, $sp, -16
; CHECK-NEXT: st.d $ra, $sp, 8 # 8-byte Folded Spill
; CHECK-NEXT: ori $a0, $zero, 1
; CHECK-NEXT: movgr2fr.w $fa0, $zero
; CHECK-NEXT: movgr2fr.d $fa1, $zero
; CHECK-NEXT: ori $a0, $zero, 1
; CHECK-NEXT: bl %plt(callee_float_in_fpr)
; CHECK-NEXT: ld.d $ra, $sp, 8 # 8-byte Folded Reload
; CHECK-NEXT: addi.d $sp, $sp, 16
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/LoongArch/calling-conv-lp64s.ll
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -27,8 +27,8 @@ define i64 @caller_float_in_regs() nounwind {
; CHECK: # %bb.0:
; CHECK-NEXT: addi.d $sp, $sp, -16
; CHECK-NEXT: st.d $ra, $sp, 8 # 8-byte Folded Spill
; CHECK-NEXT: ori $a0, $zero, 1
; CHECK-NEXT: lu12i.w $a1, 262144
; CHECK-NEXT: ori $a0, $zero, 1
; CHECK-NEXT: bl %plt(callee_float_in_regs)
; CHECK-NEXT: ld.d $ra, $sp, 8 # 8-byte Folded Reload
; CHECK-NEXT: addi.d $sp, $sp, 16
Expand Down
23 changes: 10 additions & 13 deletions llvm/test/CodeGen/LoongArch/can-not-realign-stack.ll
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -16,7 +16,6 @@ define dso_local noundef signext i32 @main() nounwind {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addi.d $sp, $sp, -272
; CHECK-NEXT: st.d $ra, $sp, 264 # 8-byte Folded Spill
; CHECK-NEXT: st.d $fp, $sp, 256 # 8-byte Folded Spill
; CHECK-NEXT: pcalau12i $a0, %pc_hi20(.LCPI0_0)
; CHECK-NEXT: addi.d $a0, $a0, %pc_lo12(.LCPI0_0)
; CHECK-NEXT: xvld $xr0, $a0, 0
Expand All @@ -33,25 +32,23 @@ define dso_local noundef signext i32 @main() nounwind {
; CHECK-NEXT: addi.d $a0, $a0, %pc_lo12(.LCPI0_3)
; CHECK-NEXT: xvld $xr3, $a0, 0
; CHECK-NEXT: xvst $xr3, $sp, 0 # 32-byte Folded Spill
; CHECK-NEXT: xvst $xr0, $sp, 128
; CHECK-NEXT: xvst $xr1, $sp, 160
; CHECK-NEXT: xvst $xr2, $sp, 192
; CHECK-NEXT: xvst $xr3, $sp, 224
; CHECK-NEXT: addi.d $fp, $sp, 128
; CHECK-NEXT: move $a0, $fp
; CHECK-NEXT: xvst $xr0, $sp, 136
; CHECK-NEXT: xvst $xr1, $sp, 168
; CHECK-NEXT: xvst $xr2, $sp, 200
; CHECK-NEXT: xvst $xr3, $sp, 232
; CHECK-NEXT: addi.d $a0, $sp, 136
; CHECK-NEXT: bl %plt(foo)
; CHECK-NEXT: xvld $xr0, $sp, 96 # 32-byte Folded Reload
; CHECK-NEXT: xvst $xr0, $sp, 128
; CHECK-NEXT: xvst $xr0, $sp, 136
; CHECK-NEXT: xvld $xr0, $sp, 64 # 32-byte Folded Reload
; CHECK-NEXT: xvst $xr0, $sp, 160
; CHECK-NEXT: xvst $xr0, $sp, 168
; CHECK-NEXT: xvld $xr0, $sp, 32 # 32-byte Folded Reload
; CHECK-NEXT: xvst $xr0, $sp, 192
; CHECK-NEXT: xvst $xr0, $sp, 200
; CHECK-NEXT: xvld $xr0, $sp, 0 # 32-byte Folded Reload
; CHECK-NEXT: xvst $xr0, $sp, 224
; CHECK-NEXT: move $a0, $fp
; CHECK-NEXT: xvst $xr0, $sp, 232
; CHECK-NEXT: addi.d $a0, $sp, 136
; CHECK-NEXT: bl %plt(bar)
; CHECK-NEXT: move $a0, $zero
; CHECK-NEXT: ld.d $fp, $sp, 256 # 8-byte Folded Reload
; CHECK-NEXT: ld.d $ra, $sp, 264 # 8-byte Folded Reload
; CHECK-NEXT: addi.d $sp, $sp, 272
; CHECK-NEXT: ret
Expand Down
Loading
Loading