[VPlan] Treat Div/Rem as not Predicated if divisor is invariant

[eastB233]

It tries to fix #94328

From what I understand so far, as recorded in the issue, I think
we can treat Div/Rem as not Predicated if divisor is invariant.

[llvmbot]

@llvm/pr-subscribers-llvm-transforms

Author: None (eastB233)

Changes

It tries to fix #94328

From what I understand so far, as recorded in the issue, I think
an instruction that would be scalar after vectorization shoud be
marked as not predicated.

---

Full diff: https://github.com/llvm/llvm-project/pull/95191.diff

1 Files Affected:

• (modified) llvm/lib/Transforms/Vectorize/LoopVectorize.cpp (+5-1)

diff --git a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
index c7c19ef456c7c..3c1520746c988 100644
--- a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+++ b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
@@ -8326,7 +8326,11 @@ VPReplicateRecipe *VPRecipeBuilder::handleReplication(Instruction *I,
       [&](ElementCount VF) { return CM.isUniformAfterVectorization(I, VF); },
       Range);
 
-  bool IsPredicated = CM.isPredicatedInst(I);
+  bool IsPredicated = LoopVectorizationPlanner::getDecisionAndClampRange(
+      [&](ElementCount VF) {
+        return CM.isPredicatedInst(I) && !CM.isScalarAfterVectorization(I, VF);
+      },
+      Range);
 
   // Even if the instruction is not marked as uniform, there are certain
   // intrinsic calls that can be effectively treated as such, so we check for

[eastB233]

#94328 has been fixed by #98892