[mlir][emitc] arith.negf to EmitC conversion

[TinaAMD]

Lower arith.negf to the unary minus in EmitC.

[llvmbot]

@llvm/pr-subscribers-mlir

@llvm/pr-subscribers-mlir-emitc

Author: Tina Jung (TinaAMD)

Changes

Lower arith.negf to the unary minus in EmitC.

---

Full diff: https://github.com/llvm/llvm-project/pull/95372.diff

3 Files Affected:

• (modified) mlir/lib/Conversion/ArithToEmitC/ArithToEmitC.cpp (+24)
• (modified) mlir/test/Conversion/ArithToEmitC/arith-to-emitc-unsupported.mlir (+16)
• (modified) mlir/test/Conversion/ArithToEmitC/arith-to-emitc.mlir (+11)

diff --git a/mlir/lib/Conversion/ArithToEmitC/ArithToEmitC.cpp b/mlir/lib/Conversion/ArithToEmitC/ArithToEmitC.cpp
index 74f0f61d04a1a..4ca59d11f0836 100644
--- a/mlir/lib/Conversion/ArithToEmitC/ArithToEmitC.cpp
+++ b/mlir/lib/Conversion/ArithToEmitC/ArithToEmitC.cpp
@@ -288,6 +288,29 @@ class CmpIOpConversion : public OpConversionPattern<arith::CmpIOp> {
   }
 };
 
+class NegFOpConversion : public OpConversionPattern<arith::NegFOp> {
+public:
+  using OpConversionPattern::OpConversionPattern;
+
+  LogicalResult
+  matchAndRewrite(arith::NegFOp op, OpAdaptor adaptor,
+                  ConversionPatternRewriter &rewriter) const override {
+
+    auto adaptedOp = adaptor.getOperand();
+    auto adaptedOpType = adaptedOp.getType();
+
+    if (!isa<FloatType>(adaptedOpType)) {
+      return rewriter.notifyMatchFailure(op.getLoc(),
+                                         "negf currently only supported on "
+                                         "floats, not tensors/vectors thereof");
+    }
+
+    rewriter.replaceOpWithNewOp<emitc::UnaryMinusOp>(op, adaptedOpType,
+                                                     adaptedOp);
+    return success();
+  }
+};
+
 template <typename ArithOp, bool castToUnsigned>
 class CastConversion : public OpConversionPattern<ArithOp> {
 public:
@@ -621,6 +644,7 @@ void mlir::populateArithToEmitCPatterns(TypeConverter &typeConverter,
     BitwiseOpConversion<arith::XOrIOp, emitc::BitwiseXorOp>,
     CmpFOpConversion,
     CmpIOpConversion,
+    NegFOpConversion,
     SelectOpConversion,
     // Truncation is guaranteed for unsigned types.
     UnsignedCastConversion<arith::TruncIOp>,
diff --git a/mlir/test/Conversion/ArithToEmitC/arith-to-emitc-unsupported.mlir b/mlir/test/Conversion/ArithToEmitC/arith-to-emitc-unsupported.mlir
index c07289109e6dd..881fadc3c9632 100644
--- a/mlir/test/Conversion/ArithToEmitC/arith-to-emitc-unsupported.mlir
+++ b/mlir/test/Conversion/ArithToEmitC/arith-to-emitc-unsupported.mlir
@@ -81,6 +81,22 @@ func.func @arith_cmpf_tensor(%arg0: tensor<5xf32>, %arg1: tensor<5xf32>) -> tens
 
 // -----
 
+func.func @arith_negf_tensor(%arg0: tensor<5xf32>) -> tensor<5xf32> {
+  // expected-error @+1 {{failed to legalize operation 'arith.negf'}}
+  %n = arith.negf %arg0 : tensor<5xf32>
+  return %n: tensor<5xf32>
+}
+
+// -----
+
+func.func @arith_negf_vector(%arg0: vector<5xf32>) -> vector<5xf32> {
+  // expected-error @+1 {{failed to legalize operation 'arith.negf'}}
+  %n = arith.negf %arg0 : vector<5xf32>
+  return %n: vector<5xf32>
+}
+
+// -----
+
 func.func @arith_extsi_i1_to_i32(%arg0: i1) {
   // expected-error @+1 {{failed to legalize operation 'arith.extsi'}}
   %idx = arith.extsi %arg0 : i1 to i32
diff --git a/mlir/test/Conversion/ArithToEmitC/arith-to-emitc.mlir b/mlir/test/Conversion/ArithToEmitC/arith-to-emitc.mlir
index 71f1a6abd913b..667ff795178a6 100644
--- a/mlir/test/Conversion/ArithToEmitC/arith-to-emitc.mlir
+++ b/mlir/test/Conversion/ArithToEmitC/arith-to-emitc.mlir
@@ -422,6 +422,17 @@ func.func @arith_cmpi_predicates(%arg0: i32, %arg1: i32) {
 
 // -----
 
+func.func @arith_negf(%arg0: f32) -> f32 {
+  // CHECK-LABEL: arith_negf
+  // CHECK-SAME: %[[Arg0:[^ ]*]]: f32
+  // CHECK: %[[N:[^ ]*]] = emitc.unary_minus %[[Arg0]] : (f32) -> f32
+  %n = arith.negf %arg0 : f32
+  // CHECK: return %[[N]]
+  return %n: f32
+}
+
+// -----
+
 func.func @arith_float_to_int_cast_ops(%arg0: f32, %arg1: f64) {
   // CHECK: emitc.cast %arg0 : f32 to i32
   %0 = arith.fptosi %arg0 : f32 to i32

[simon-camp]

LGTM, besides the type check. We would generate illegal operations for f16 types otherwise, I think.

[simon-camp]

LGTM, besides the two nits

[simon-camp]

Thanks!