Skip to content

[DAG] getOperationAction - always return Custom action for target opcodes #95401

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 1 commit into from
Jun 13, 2024
Merged
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
3 changes: 2 additions & 1 deletion llvm/include/llvm/CodeGen/TargetLowering.h
Original file line number Diff line number Diff line change
Expand Up @@ -1255,11 +1255,12 @@ class TargetLoweringBase {
/// be promoted to a larger size, needs to be expanded to some other code
/// sequence, or the target has a custom expander for it.
LegalizeAction getOperationAction(unsigned Op, EVT VT) const {
if (VT.isExtended()) return Expand;
// If a target-specific SDNode requires legalization, require the target
// to provide custom legalization for it.
if (Op >= std::size(OpActions[0]))
return Custom;
if (VT.isExtended())
return Expand;
return OpActions[(unsigned)VT.getSimpleVT().SimpleTy][Op];
}

Expand Down
47 changes: 47 additions & 0 deletions llvm/test/CodeGen/X86/pr95274.ll
Original file line number Diff line number Diff line change
@@ -0,0 +1,47 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc < %s -mtriple=x86_64-- -mcpu=skylake-avx512 | FileCheck %s

define void @PR95274(ptr %p0) nounwind {
; CHECK-LABEL: PR95274:
; CHECK: # %bb.0:
; CHECK-NEXT: vcvtps2ph $4, %zmm0, %ymm0
; CHECK-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
; CHECK-NEXT: vmovups %zmm0, 1984(%rdi)
; CHECK-NEXT: vmovups %zmm0, 1920(%rdi)
; CHECK-NEXT: vmovups %zmm0, 1856(%rdi)
; CHECK-NEXT: vmovups %zmm0, 1792(%rdi)
; CHECK-NEXT: vmovups %zmm0, 1728(%rdi)
; CHECK-NEXT: vmovups %zmm0, 1664(%rdi)
; CHECK-NEXT: vmovups %zmm0, 1600(%rdi)
; CHECK-NEXT: vmovups %zmm0, 1536(%rdi)
; CHECK-NEXT: vmovups %zmm0, 1472(%rdi)
; CHECK-NEXT: vmovups %zmm0, 1408(%rdi)
; CHECK-NEXT: vmovups %zmm0, 1344(%rdi)
; CHECK-NEXT: vmovups %zmm0, 1280(%rdi)
; CHECK-NEXT: vmovups %zmm0, 1216(%rdi)
; CHECK-NEXT: vmovups %zmm0, 1152(%rdi)
; CHECK-NEXT: vmovups %zmm0, 1088(%rdi)
; CHECK-NEXT: vmovups %zmm0, 1024(%rdi)
; CHECK-NEXT: vmovups %zmm0, 960(%rdi)
; CHECK-NEXT: vmovups %zmm0, 896(%rdi)
; CHECK-NEXT: vmovups %zmm0, 832(%rdi)
; CHECK-NEXT: vmovups %zmm0, 768(%rdi)
; CHECK-NEXT: vmovups %zmm0, 704(%rdi)
; CHECK-NEXT: vmovups %zmm0, 640(%rdi)
; CHECK-NEXT: vmovups %zmm0, 576(%rdi)
; CHECK-NEXT: vmovups %zmm0, 512(%rdi)
; CHECK-NEXT: vmovups %zmm0, 448(%rdi)
; CHECK-NEXT: vmovups %zmm0, 384(%rdi)
; CHECK-NEXT: vmovups %zmm0, 320(%rdi)
; CHECK-NEXT: vmovups %zmm0, 256(%rdi)
; CHECK-NEXT: vmovups %zmm0, 192(%rdi)
; CHECK-NEXT: vmovups %zmm0, 128(%rdi)
; CHECK-NEXT: vmovups %zmm0, 64(%rdi)
; CHECK-NEXT: vmovups %zmm0, (%rdi)
; CHECK-NEXT: vzeroupper
; CHECK-NEXT: retq
%load = load <1024 x float>, ptr %p0, align 2
%trunc = fptrunc <1024 x float> poison to <1024 x half>
store <1024 x half> %trunc, ptr %p0, align 2
ret void
}
Loading