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[IR] Mark shl constant expression as undesirable #95940

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Merged
merged 1 commit into from
Jun 19, 2024
Merged

[IR] Mark shl constant expression as undesirable #95940

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2 changes: 1 addition & 1 deletion llvm/lib/IR/Constants.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -2324,11 +2324,11 @@ bool ConstantExpr::isDesirableBinOp(unsigned Opcode) {
case Instruction::Or:
case Instruction::LShr:
case Instruction::AShr:
case Instruction::Shl:
return false;
case Instruction::Add:
case Instruction::Sub:
case Instruction::Mul:
case Instruction::Shl:
case Instruction::Xor:
return true;
default:
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3 changes: 2 additions & 1 deletion llvm/test/CodeGen/AArch64/stack-tagging-initializer-merge.ll
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Expand Up @@ -304,8 +304,9 @@ define void @InitVectorSplit() sanitize_memtag {
; CHECK-NEXT: [[TX:%.*]] = call ptr @llvm.aarch64.tagp.p0(ptr [[X]], ptr [[BASETAG]], i64 0)
; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[X]])
; CHECK-NEXT: [[TMP0:%.*]] = getelementptr i32, ptr [[TX]], i32 1
; CHECK-NEXT: [[TMP1:%.*]] = shl i64 bitcast (<2 x i32> <i32 1, i32 2> to i64), 32
; CHECK-NEXT: [[LSHR:%.*]] = lshr i64 bitcast (<2 x i32> <i32 1, i32 2> to i64), 32
; CHECK-NEXT: call void @llvm.aarch64.stgp(ptr [[TX]], i64 shl (i64 bitcast (<2 x i32> <i32 1, i32 2> to i64), i64 32), i64 [[LSHR]])
; CHECK-NEXT: call void @llvm.aarch64.stgp(ptr [[TX]], i64 [[TMP1]], i64 [[LSHR]])
; CHECK-NEXT: call void @use(ptr nonnull [[TX]])
; CHECK-NEXT: call void @llvm.aarch64.settag(ptr [[X]], i64 16)
; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[X]])
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15 changes: 9 additions & 6 deletions llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-constants.ll
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Expand Up @@ -143,8 +143,9 @@ define ptr addrspace(7) @gep_p7_from_p7() {
define i160 @ptrtoint() {
; CHECK-LABEL: define i160 @ptrtoint
; CHECK-SAME: () #[[ATTR0]] {
; CHECK-NEXT: [[TMP1:%.*]] = or i160 shl nuw (i160 ptrtoint (ptr addrspace(8) @buf to i160), i160 32), 12
; CHECK-NEXT: ret i160 [[TMP1]]
; CHECK-NEXT: [[TMP1:%.*]] = shl nuw i160 ptrtoint (ptr addrspace(8) @buf to i160), 32
; CHECK-NEXT: [[TMP2:%.*]] = or i160 [[TMP1]], 12
; CHECK-NEXT: ret i160 [[TMP2]]
;
ret i160 ptrtoint(
ptr addrspace(7) getelementptr(
Expand All @@ -155,8 +156,9 @@ define i160 @ptrtoint() {
define i256 @ptrtoint_long() {
; CHECK-LABEL: define i256 @ptrtoint_long
; CHECK-SAME: () #[[ATTR0]] {
; CHECK-NEXT: [[TMP1:%.*]] = or i256 shl nuw nsw (i256 ptrtoint (ptr addrspace(8) @buf to i256), i256 32), 12
; CHECK-NEXT: ret i256 [[TMP1]]
; CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i256 ptrtoint (ptr addrspace(8) @buf to i256), 32
; CHECK-NEXT: [[TMP2:%.*]] = or i256 [[TMP1]], 12
; CHECK-NEXT: ret i256 [[TMP2]]
;
ret i256 ptrtoint(
ptr addrspace(7) getelementptr(
Expand All @@ -167,8 +169,9 @@ define i256 @ptrtoint_long() {
define i64 @ptrtoint_short() {
; CHECK-LABEL: define i64 @ptrtoint_short
; CHECK-SAME: () #[[ATTR0]] {
; CHECK-NEXT: [[TMP1:%.*]] = or i64 shl (i64 ptrtoint (ptr addrspace(8) @buf to i64), i64 32), 12
; CHECK-NEXT: ret i64 [[TMP1]]
; CHECK-NEXT: [[TMP1:%.*]] = shl i64 ptrtoint (ptr addrspace(8) @buf to i64), 32
; CHECK-NEXT: [[TMP2:%.*]] = or i64 [[TMP1]], 12
; CHECK-NEXT: ret i64 [[TMP2]]
;
ret i64 ptrtoint(
ptr addrspace(7) getelementptr(
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