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Enable ASAN in amdgpu toolchain for OpenCL #96262

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Merged
merged 1 commit into from
Jun 21, 2024
Merged

Enable ASAN in amdgpu toolchain for OpenCL #96262

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6 changes: 6 additions & 0 deletions clang/lib/Driver/ToolChains/AMDGPU.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -14,6 +14,7 @@
#include "clang/Driver/DriverDiagnostic.h"
#include "clang/Driver/InputInfo.h"
#include "clang/Driver/Options.h"
#include "clang/Driver/SanitizerArgs.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/Option/ArgList.h"
#include "llvm/Support/Error.h"
Expand Down Expand Up @@ -946,6 +947,11 @@ void ROCMToolChain::addClangTargetOptions(
DriverArgs, LibDeviceFile, Wave64, DAZ, FiniteOnly, UnsafeMathOpt,
FastRelaxedMath, CorrectSqrt, ABIVer, false));

if (getSanitizerArgs(DriverArgs).needsAsanRt()) {
CC1Args.push_back("-mlink-bitcode-file");
CC1Args.push_back(
DriverArgs.MakeArgString(RocmInstallation->getAsanRTLPath()));
}
for (StringRef BCFile : BCLibs) {
CC1Args.push_back("-mlink-builtin-bitcode");
CC1Args.push_back(DriverArgs.MakeArgString(BCFile));
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3 changes: 3 additions & 0 deletions clang/lib/Driver/ToolChains/AMDGPU.h
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Expand Up @@ -140,6 +140,9 @@ class LLVM_LIBRARY_VISIBILITY ROCMToolChain : public AMDGPUToolChain {
getCommonDeviceLibNames(const llvm::opt::ArgList &DriverArgs,
const std::string &GPUArch,
bool isOpenMP = false) const;
SanitizerMask getSupportedSanitizers() const override {
return SanitizerKind::Address;
}
};

} // end namespace toolchains
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16 changes: 16 additions & 0 deletions clang/test/Driver/rocm-device-libs.cl
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Expand Up @@ -132,9 +132,20 @@
// RUN: %S/opencl.cl \
// RUN: 2>&1 | FileCheck --check-prefixes=COMMON,COMMON-DEFAULT,GFX900-DEFAULT,GFX900,WAVE64 %s

// RUN: %clang -### -target amdgcn-amd-amdhsa \
// RUN: -x cl -mcpu=gfx908:xnack+ -fsanitize=address \
// RUN: --rocm-path=%S/Inputs/rocm \
// RUN: %s \
// RUN: 2>&1 | FileCheck --check-prefixes=ASAN,COMMON %s

// RUN: %clang -### -target amdgcn-amd-amdhsa \
// RUN: -x cl -mcpu=gfx908:xnack+ \
// RUN: --rocm-path=%S/Inputs/rocm \
// RUN: %s \
// RUN: 2>&1 | FileCheck --check-prefixes=NOASAN %s

// COMMON: "-triple" "amdgcn-amd-amdhsa"
// ASAN-SAME: "-mlink-bitcode-file" "{{.*}}/amdgcn/bitcode/asanrtl.bc"
// COMMON-SAME: "-mlink-builtin-bitcode" "{{.*}}/amdgcn/bitcode/opencl.bc"
// COMMON-SAME: "-mlink-builtin-bitcode" "{{.*}}/amdgcn/bitcode/ocml.bc"
// COMMON-SAME: "-mlink-builtin-bitcode" "{{.*}}/amdgcn/bitcode/ockl.bc"
Expand Down Expand Up @@ -169,6 +180,11 @@
// COMMON-UNSAFE-MATH-SAME: "-mlink-builtin-bitcode" "{{.*}}/amdgcn/bitcode/oclc_finite_only_off.bc"
// COMMON-UNSAFE-MATH-SAME: "-mlink-builtin-bitcode" "{{.*}}/amdgcn/bitcode/oclc_correctly_rounded_sqrt_off.bc"

// ASAN-SAME: "-fsanitize=address"

// NOASAN-NOT: "-fsanitize=address"
// NOASAN-NOT: amdgcn/bitcode/asanrtl.bc
Comment on lines +185 to +186
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Usual gripe about fragility of negative tests

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understood. that's why I single out the negative tests to a separate run line. since there is only negative check in this run, they do not depend on order. hopefully it will be stable


// WAVE64: "-mlink-builtin-bitcode" "{{.*}}/amdgcn/bitcode/oclc_wavefrontsize64_on.bc"
// WAVE32: "-mlink-builtin-bitcode" "{{.*}}/amdgcn/bitcode/oclc_wavefrontsize64_off.bc"

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