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[CodeGen] Cache Opcode in MachineInstr #96797

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Merged
merged 1 commit into from
Jun 27, 2024

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aengelke
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This avoids the indirection through MCID when just accessing the opcode. This uses two of the four padding bytes at the end of MachineInstr.


http://llvm-compile-time-tracker.com/compare.php?from=54cb5ca9f48fc542b920662a0eee7c0e6f35bee0&to=b0f960613dd2188e2673663b9e8e38d2092e7d3f&stat=instructions:u

The actual performance impact might be slightly larger, as the MCID is less likely to be in cache than the MachineInstr.

This avoids the indirection through MCID when just accessing the opcode.
@MaskRay
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MaskRay commented Jun 26, 2024

I checked the best place for Opcode but it seems that the end is good.

@arsenm
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arsenm commented Jun 27, 2024

We have a bunch of full bools in MachineInstr, does turning those into bitfields do anything?

@aengelke
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We have a bunch of full bools in MachineInstr, does turning those into bitfields do anything?

The only bools I see are in (out-of-line) ExtraInfo, which is not directly part of MachineInstr and not always allocated.

@aengelke aengelke merged commit aa24e36 into llvm:main Jun 27, 2024
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@aengelke aengelke deleted the perf/machineinstr-opcode branch June 27, 2024 15:10
lravenclaw pushed a commit to lravenclaw/llvm-project that referenced this pull request Jul 3, 2024
This avoids the indirection through MCID when just accessing the opcode.
This uses two of the four padding bytes at the end of MachineInstr.
AlexisPerry pushed a commit to llvm-project-tlp/llvm-project that referenced this pull request Jul 9, 2024
This avoids the indirection through MCID when just accessing the opcode.
This uses two of the four padding bytes at the end of MachineInstr.
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3 participants