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[InstCombine][X86] Fold blendv(x,y,shuffle(bitcast(sext(m)))) -> select(shuffle(m),x,y) #96882

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Jul 3, 2024
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36 changes: 34 additions & 2 deletions llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2800,6 +2800,23 @@ X86TTIImpl::instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const {
return SelectInst::Create(NewSelector, Op1, Op0, "blendv");
}

// Peek through a one-use shuffle - VectorCombine should have simplified
// this for cases where we're splitting wider vectors to use blendv
// intrinsics.
Value *MaskSrc = nullptr;
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Should we peekThroughBitcast on Mask here?

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I'll investigate this as a followup, but I've already tried very hard on VectorCombine to make sure we simplify bitcast(shuffle(bitcast(shuffle()))) chains that we would have to peek through

ArrayRef<int> ShuffleMask;
if (match(Mask, PatternMatch::m_OneUse(PatternMatch::m_Shuffle(
PatternMatch::m_Value(MaskSrc), PatternMatch::m_Undef(),
PatternMatch::m_Mask(ShuffleMask))))) {
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nit: We should probably just start using PatternMatch namespace at the top of the function. That can be a later NFC though.

// Bail if the shuffle was irregular or contains undefs.
int NumElts = cast<FixedVectorType>(MaskSrc->getType())->getNumElements();
if (NumElts < ShuffleMask.size() || !isPowerOf2_32(NumElts) ||
any_of(ShuffleMask,
[NumElts](int M) { return M < 0 || M >= NumElts; }))
break;
Mask = MaskSrc;
}

// Convert to a vector select if we can bypass casts and find a boolean
// vector condition value.
Value *BoolVec;
Expand All @@ -2809,11 +2826,26 @@ X86TTIImpl::instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const {
BoolVec->getType()->getScalarSizeInBits() == 1) {
auto *MaskTy = cast<FixedVectorType>(Mask->getType());
auto *OpTy = cast<FixedVectorType>(II.getType());
unsigned NumMaskElts = MaskTy->getNumElements();
unsigned NumOperandElts = OpTy->getNumElements();

// If we peeked through a shuffle, reapply the shuffle to the bool vector.
if (MaskSrc) {
unsigned NumMaskSrcElts =
cast<FixedVectorType>(MaskSrc->getType())->getNumElements();
NumMaskElts = (ShuffleMask.size() * NumMaskElts) / NumMaskSrcElts;
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Isn't ShuffleMask.size() equal to NumMaskSrcElts?

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IR can have different result and argument vector widths (this patch is mainly to help extract subvector style shuffles after all) - only DAG is fixed

// Multiple mask bits maps to the same operand element - bail out.
if (NumMaskElts > NumOperandElts)
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isn't the scaleShuffleMaskElts check sufficient? If the shuffle is only smaller type but keep all OpTy elements together isn't that fine?

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we don't handle NumMaskElts > NumOperandElts (IIRC due to endianess issues) - this is an early out so we don't bother creating an unused shuffle instruction

break;
SmallVector<int> ScaledMask;
if (!llvm::scaleShuffleMaskElts(NumMaskElts, ShuffleMask, ScaledMask))
break;
BoolVec = IC.Builder.CreateShuffleVector(BoolVec, ScaledMask);
MaskTy = FixedVectorType::get(MaskTy->getElementType(), NumMaskElts);
}
assert(MaskTy->getPrimitiveSizeInBits() ==
OpTy->getPrimitiveSizeInBits() &&
"Not expecting mask and operands with different sizes");
unsigned NumMaskElts = MaskTy->getNumElements();
unsigned NumOperandElts = OpTy->getNumElements();

if (NumMaskElts == NumOperandElts) {
return SelectInst::Create(BoolVec, Op1, Op0);
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