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Inline: Fix handling of byval using non-alloca addrspace #97306
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arsenm
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Jul 1, 2024
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38 changes: 38 additions & 0 deletions
38
llvm/test/Transforms/Inline/byval-with-non-alloca-addrspace.ll
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,38 @@ | ||
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 | ||
; RUN: opt -S -passes=always-inline %s | FileCheck %s | ||
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; The byval parameters use a different address space from the alloca | ||
; address space. Make sure this is gracefully handled by using the | ||
; original byval pointer type's address space instead of what the | ||
; datalayout says to use. | ||
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target datalayout = "A5" | ||
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%struct = type { i64, i64 } | ||
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define i64 @bar(ptr byval(%struct) %a) alwaysinline { | ||
; CHECK-LABEL: define i64 @bar( | ||
; CHECK-SAME: ptr byval([[STRUCT:%.*]]) [[A:%.*]]) #[[ATTR0:[0-9]+]] { | ||
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT]], ptr [[A]], i64 0, i32 1 | ||
; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 4 | ||
; CHECK-NEXT: ret i64 0 | ||
; | ||
%1 = getelementptr %struct, ptr %a, i64 0, i32 1 | ||
%2 = load i64, ptr %1, align 4 | ||
ret i64 0 | ||
} | ||
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define i64 @foo(ptr %arg) { | ||
; CHECK-LABEL: define i64 @foo( | ||
; CHECK-SAME: ptr [[ARG:%.*]]) { | ||
; CHECK-NEXT: [[ARG1:%.*]] = alloca [[STRUCT:%.*]], align 8 | ||
; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr [[ARG1]]) | ||
; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 1 [[ARG1]], ptr align 1 [[ARG]], i64 16, i1 false) | ||
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT]], ptr [[ARG1]], i64 0, i32 1 | ||
; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 4 | ||
; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr [[ARG1]]) | ||
; CHECK-NEXT: ret i64 0 | ||
; | ||
%1 = call i64 @bar(ptr byval(%struct) align 8 %arg) | ||
ret i64 0 | ||
} |
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@arsenm
Digging a bit into git log the patch that added DL.getAllocaAddrSpace() was the following:
and reasoning behind that patch:
" These are problems for AMDGPU because alloca is used to
implement the private address space, which uses a 32-bit
index as the pointer value. Other pointers are 64-bit
and behave more like LLVM's notion of generic address
space. By changing the address space used for allocas,
we can change our generic pointer type to be LLVM's generic
pointer type which does have similar properties."
makes sense to me especially in OpenCL context, where default address space is 4 (generic). Also IMHO LLVM passes must respect target's datalayout when picking possible types for the created instructions.
Current fix brings some complications though (from OpenCL point of view, but there might be issues for other languages and targets outside of my expertise), if byval pointer of a function was in default aka genetic address space, then the alloca would be in generic. Meanwhile per SPIR-V (to which LLVM IR is being lowered starting from OpenCL 2.0) specification OpVariable must have non-generic storage class. It can probably be workarounded in https://github.com/KhronosGroup/SPIRV-LLVM-Translator by translating alloca addrspace(4) to OpVariable with Private storage class bringing extra address space casts, or by modifying clang, introducing an exception for byval pointers making them not be in generic address space, but in private, but I wonder if #97086 can be solved differently - instead here if Arg->getType()->getPointerAddressSpace() != DL.getAllocaAddrSpace() - we still create an alloca in default datalayout address space and add an AS cast, WDYT?
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I'm not sure I fully understand the proposal, but for the CHERI use case (the AMD version was based on the CHERI fork, which we aim to start upstreaming soon), allocas must be created in the alloca address space, not some other address space and cast.
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I mean: leave alloca in DL.getAllocaAddrSpace() AS and if it doesn't match with byval pointer's address space - create a cast from alloca to byval's address space and update users of the alloca to use the cast. But digging more into it might be not as trivial as I though initially - at least it seems it shouldn't be done in HandleByValArgument, but probably later in the stack.
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That would not break anything for CHERI, if it works for other use cases.
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No, this is the correct fix. We should follow what the existing IR says. The rule is not all allocas must have the alloca address space, it's the alloca address space is the default for contextless new values.
As far as OpenCL is concerned such IR would have been malformed in the first place. If we wanted to handle this as a generic pointer with a private backed alloca, it should be handled by lowering the alloca with the wrong address space to include the cast (which is essentially what NVPTX does, it's just more work for the backend and less optimizable IR)