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[AMX] Error out when AMX DP instructions use same registers #97686
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@llvm/pr-subscribers-mc @llvm/pr-subscribers-backend-x86 Author: Phoebe Wang (phoebewang) ChangesFixes #97522 Full diff: https://github.com/llvm/llvm-project/pull/97686.diff 2 Files Affected:
diff --git a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
index dbea42d55b5fce..e49e96ceef6a4a 100644
--- a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -3849,6 +3849,14 @@ bool X86AsmParser::validateInstruction(MCInst &Inst, const OperandVector &Ops) {
return Warning(Ops[0]->getStartLoc(), "mask, index, and destination "
"registers should be distinct");
}
+ } else if (isTCMMIMFP16PS(Opcode) || isTCMMRLFP16PS(Opcode) ||
+ isTDPBF16PS(Opcode) || isTDPFP16PS(Opcode) || isTDPBSSD(Opcode) ||
+ isTDPBSUD(Opcode) || isTDPBUSD(Opcode) || isTDPBUUD(Opcode)) {
+ unsigned SrcDest = Inst.getOperand(0).getReg();
+ unsigned Src1 = Inst.getOperand(2).getReg();
+ unsigned Src2 = Inst.getOperand(3).getReg();
+ if (SrcDest == Src1 || SrcDest == Src2 || Src1 == Src2)
+ return Error(Ops[0]->getStartLoc(), "all tmm registers must be distinct");
}
// Check that we aren't mixing AH/BH/CH/DH with REX prefix. We only need to
diff --git a/llvm/test/MC/X86/AMX/amx-error.s b/llvm/test/MC/X86/AMX/amx-error.s
new file mode 100644
index 00000000000000..ee2ac83545b5a3
--- /dev/null
+++ b/llvm/test/MC/X86/AMX/amx-error.s
@@ -0,0 +1,25 @@
+// RUN: not llvm-mc -triple x86_64 %s 2>&1 | FileCheck %s
+
+// CHECK: error: all tmm registers must be distinct
+tcmmimfp16ps %tmm0, %tmm0, %tmm0
+
+// CHECK: error: all tmm registers must be distinct
+tcmmrlfp16ps %tmm1, %tmm0, %tmm1
+
+// CHECK: error: all tmm registers must be distinct
+tdpbf16ps %tmm2, %tmm2, %tmm0
+
+// CHECK: error: all tmm registers must be distinct
+tdpfp16ps %tmm3, %tmm0, %tmm0
+
+// CHECK: error: all tmm registers must be distinct
+tdpbssd %tmm0, %tmm0, %tmm0
+
+// CHECK: error: all tmm registers must be distinct
+tdpbsud %tmm1, %tmm0, %tmm1
+
+// CHECK: error: all tmm registers must be distinct
+tdpbusd %tmm2, %tmm2, %tmm0
+
+// CHECK: error: all tmm registers must be distinct
+tdpbuud %tmm3, %tmm0, %tmm0
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LGTM
LLVM Buildbot has detected a new failure on builder Full details are available at: https://lab.llvm.org/buildbot/#/builders/66/builds/1016 Here is the relevant piece of the build log for the reference:
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Fixes #97522