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[clang] Limit alignment for emitted vectors #98629

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[clang] Limit alignment for emitted vectors #98629

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ba498f5
[clang] Limit alignment for emitted vectors
Fznamznon Jul 12, 2024
2aa206b
Use MaxVectorAlign
Fznamznon Jul 16, 2024
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3 changes: 2 additions & 1 deletion clang/lib/Basic/TargetInfo.cpp
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Expand Up @@ -120,7 +120,8 @@ TargetInfo::TargetInfo(const llvm::Triple &T) : Triple(T) {
LargeArrayMinWidth = 0;
LargeArrayAlign = 0;
MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 0;
MaxVectorAlign = 0;
// LLVM can only process alignment up to 2^14 bytes.
MaxVectorAlign = 8 << 14;
MaxTLSAlign = 0;
SizeType = UnsignedLong;
PtrDiffType = SignedLong;
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8 changes: 8 additions & 0 deletions clang/lib/CodeGen/ABIInfoImpl.cpp
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Expand Up @@ -38,6 +38,10 @@ ABIArgInfo DefaultABIInfo::classifyArgumentType(QualType Ty) const {
: Context.LongLongTy))
return getNaturalAlignIndirect(Ty);

if (Ty->getAs<VectorType>() &&
Context.getTypeSize(Ty) > getTarget().getMaxVectorAlign())
return getNaturalAlignIndirect(Ty);

return (isPromotableIntegerTypeForABI(Ty) ? ABIArgInfo::getExtend(Ty)
: ABIArgInfo::getDirect());
}
Expand All @@ -60,6 +64,10 @@ ABIArgInfo DefaultABIInfo::classifyReturnType(QualType RetTy) const {
: getContext().LongLongTy))
return getNaturalAlignIndirect(RetTy);

if (RetTy->getAs<VectorType>() &&
getContext().getTypeSize(RetTy) > getTarget().getMaxVectorAlign())
return getNaturalAlignIndirect(RetTy);

return (isPromotableIntegerTypeForABI(RetTy) ? ABIArgInfo::getExtend(RetTy)
: ABIArgInfo::getDirect());
}
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4 changes: 4 additions & 0 deletions clang/lib/CodeGen/Targets/X86.cpp
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Expand Up @@ -2175,6 +2175,10 @@ ABIArgInfo X86_64ABIInfo::getIndirectReturnResult(QualType Ty) const {
if (Ty->isBitIntType())
return getNaturalAlignIndirect(Ty);

if (Ty->getAs<VectorType>() &&
getContext().getTypeSize(Ty) > getTarget().getMaxVectorAlign())
return getNaturalAlignIndirect(Ty);

return (isPromotableIntegerTypeForABI(Ty) ? ABIArgInfo::getExtend(Ty)
: ABIArgInfo::getDirect());
}
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6 changes: 3 additions & 3 deletions clang/test/CodeGen/X86/x86-vec-i128.c
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Expand Up @@ -32,7 +32,7 @@ typedef unsigned long long v32u64 __attribute__((vector_size(32)));
typedef unsigned __int128 v32u128 __attribute__((vector_size(32)));

v32u64 test_v32u128(v32u64 a, v32u128 b) {
// MEM256ALIGN16: define{{.*}} <4 x i64> @test_v32u128(ptr noundef byval(<4 x i64>) align 16 %{{.*}}, ptr noundef byval(<2 x i128>) align 16 %{{.*}})
// MEM256ALIGN16: define{{.*}} void @test_v32u128(ptr dead_on_unwind noalias writable sret(<4 x i64>) align 16 %{{.*}}, ptr noundef byval(<4 x i64>) align 16 %{{.*}}, ptr noundef byval(<2 x i128>) align 16 %{{.*}})
// MEM256ALIGN32: define{{.*}} <4 x i64> @test_v32u128(ptr noundef byval(<4 x i64>) align 32 %{{.*}}, ptr noundef byval(<2 x i128>) align 32 %{{.*}})
// CLANG10ABI256: define{{.*}} <4 x i64> @test_v32u128(<4 x i64> noundef %{{.*}}, ptr noundef byval(<2 x i128>) align 32 %{{.*}})
// CLANG9ABI256: define{{.*}} <4 x i64> @test_v32u128(<4 x i64> noundef %{{.*}}, <2 x i128> noundef %{{.*}})
Expand All @@ -43,8 +43,8 @@ typedef unsigned long long v64u64 __attribute__((vector_size(64)));
typedef unsigned __int128 v64u128 __attribute__((vector_size(64)));

v64u64 test_v64u128(v64u64 a, v64u128 b) {
// MEM512ALIGN16: define{{.*}} <8 x i64> @test_v64u128(ptr noundef byval(<8 x i64>) align 16 %{{.*}}, ptr noundef byval(<4 x i128>) align 16 %{{.*}})
// MEM512ALIGN32: define{{.*}} <8 x i64> @test_v64u128(ptr noundef byval(<8 x i64>) align 32 %{{.*}}, ptr noundef byval(<4 x i128>) align 32 %{{.*}})
// MEM512ALIGN16: define{{.*}} void @test_v64u128(ptr dead_on_unwind noalias writable sret(<8 x i64>) align 16 %{{.*}}, ptr noundef byval(<8 x i64>) align 16 %{{.*}}, ptr noundef byval(<4 x i128>) align 16 %{{.*}})
// MEM512ALIGN32: define{{.*}} void @test_v64u128(ptr dead_on_unwind noalias writable sret(<8 x i64>) align 32 %{{.*}}, ptr noundef byval(<8 x i64>) align 32 %{{.*}}, ptr noundef byval(<4 x i128>) align 32 %{{.*}})
// MEM512ALIGN64: define{{.*}} <8 x i64> @test_v64u128(ptr noundef byval(<8 x i64>) align 64 %{{.*}}, ptr noundef byval(<4 x i128>) align 64 %{{.*}})
// CLANG10ABI512: define{{.*}} <8 x i64> @test_v64u128(<8 x i64> noundef %{{.*}}, ptr noundef byval(<4 x i128>) align 64 %{{.*}})
// CLANG9ABI512: define{{.*}} <8 x i64> @test_v64u128(<8 x i64> noundef %{{.*}}, <4 x i128> noundef %{{.*}})
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17 changes: 17 additions & 0 deletions clang/test/CodeGen/big-vectors.c
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@@ -0,0 +1,17 @@
// RUN: %clang_cc1 -O0 -triple x86_64 %s -emit-llvm -o - | FileCheck --check-prefixes=x86 %s
// RUN: %clang_cc1 -O0 -triple spir64 %s -emit-llvm -o - | FileCheck --check-prefixes=SPIR %s

typedef float fvec __attribute__((ext_vector_type(5120)));
fvec foo(fvec a) {
fvec c;
return c;
}
// x86-DAG: define{{.*}}@foo{{.*}}sret(<5120 x float>) align 16384{{.*}}byval(<5120 x float>) align 16384
// SPIR: define{{.*}}@foo({{.*}}sret(<5120 x float>) align 16384{{.*}}byval(<5120 x float>) align 16384

void bar() {
fvec a;
fvec c = foo(a);
// x86-DAG: call void @foo({{.*}}sret(<5120 x float>) align 16384{{.*}}byval(<5120 x float>) align 16384
// SPIR: call spir_func void @foo({{.*}}sret(<5120 x float>) align 16384{{.*}}byval(<5120 x float>) align 16384
}
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