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AMDGPU: Clear kill flags after FoldZeroHighBits #99582

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Merged
merged 2 commits into from
Jul 19, 2024
Merged

AMDGPU: Clear kill flags after FoldZeroHighBits #99582

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0b68015
AMDGPU: Clear kill flags after FoldZeroHighBits
changpeng Jul 18, 2024
8bcc56a
AMDGPU: Clear kill flags after FoldZeroHighBits
changpeng Jul 19, 2024
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4 changes: 3 additions & 1 deletion llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -1361,7 +1361,9 @@ bool SIFoldOperands::tryFoldZeroHighBits(MachineInstr &MI) const {
return false;

Register Dst = MI.getOperand(0).getReg();
MRI->replaceRegWith(Dst, SrcDef->getOperand(0).getReg());
MRI->replaceRegWith(Dst, Src1);
if (!MI.getOperand(2).isKill())
MRI->clearKillFlags(Src1);
MI.eraseFromParent();
return true;
}
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54 changes: 54 additions & 0 deletions llvm/test/CodeGen/AMDGPU/fold-zero-high-bits-clear-kill-flags.mir
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@@ -0,0 +1,54 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
# RUN: llc -mtriple=amdgcn--amdhsa -mcpu=gfx940 -verify-machineinstrs -run-pass si-fold-operands -o - %s | FileCheck -enable-var-scope -check-prefix=GCN %s

---
name: fold_zero_high_bits_src1_alive
tracksRegLiveness: true

body: |
bb.0:
liveins: $vgpr0, $vgpr1
; GCN-LABEL: name: fold_zero_high_bits_src1_alive
; GCN: liveins: $vgpr0, $vgpr1
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_ADD_U16_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U16_e64 [[COPY]], 1, 0, implicit $exec
; GCN-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 65535
; GCN-NEXT: [[V_MUL_U32_U24_e64_:%[0-9]+]]:vgpr_32 = V_MUL_U32_U24_e64 [[V_ADD_U16_e64_]], 1, 0, implicit $exec
; GCN-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
; GCN-NEXT: [[V_SUB_U16_e64_:%[0-9]+]]:vgpr_32 = V_SUB_U16_e64 [[V_ADD_U16_e64_]], [[COPY1]], 0, implicit $exec
%0:vgpr_32 = COPY $vgpr0
%1:sreg_32 = S_MOV_B32 1
%2:vgpr_32 = V_ADD_U16_e64 %0:vgpr_32, %1:sreg_32, 0, implicit $exec
%3:sreg_32 = S_MOV_B32 65535
%4:vgpr_32 = V_AND_B32_e64 %3:sreg_32, %2:vgpr_32, implicit $exec
%5:vgpr_32 = V_MUL_U32_U24_e64 killed %4:vgpr_32, %1:sreg_32, 0, implicit $exec
%6:vgpr_32 = COPY $vgpr1
%7:vgpr_32 = V_SUB_U16_e64 %2:vgpr_32, %6:vgpr_32, 0, implicit $exec
...

---
name: fold_zero_high_bits_src1_killed
tracksRegLiveness: true

body: |
bb.0:
liveins: $vgpr0, $vgpr1
; GCN-LABEL: name: fold_zero_high_bits_src1_killed
; GCN: liveins: $vgpr0, $vgpr1
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_ADD_U16_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U16_e64 [[COPY]], 1, 0, implicit $exec
; GCN-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
; GCN-NEXT: [[V_SUB_U16_e64_:%[0-9]+]]:vgpr_32 = V_SUB_U16_e64 [[V_ADD_U16_e64_]], [[COPY1]], 0, implicit $exec
; GCN-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 65535
; GCN-NEXT: [[V_MUL_U32_U24_e64_:%[0-9]+]]:vgpr_32 = V_MUL_U32_U24_e64 killed [[V_ADD_U16_e64_]], 1, 0, implicit $exec
%0:vgpr_32 = COPY $vgpr0
%1:sreg_32 = S_MOV_B32 1
%2:vgpr_32 = V_ADD_U16_e64 %0:vgpr_32, %1:sreg_32, 0, implicit $exec
%6:vgpr_32 = COPY $vgpr1
%7:vgpr_32 = V_SUB_U16_e64 %2:vgpr_32, %6:vgpr_32, 0, implicit $exec
%3:sreg_32 = S_MOV_B32 65535
%4:vgpr_32 = V_AND_B32_e64 %3:sreg_32, killed %2:vgpr_32, implicit $exec
%5:vgpr_32 = V_MUL_U32_U24_e64 killed %4:vgpr_32, %1:sreg_32, 0, implicit $exec
...
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