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[MVT][TableGen] Extend Machine Value Type to uint16_t #99657

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16 changes: 8 additions & 8 deletions llvm/include/llvm/CodeGen/ValueTypes.td
Original file line number Diff line number Diff line change
Expand Up @@ -289,34 +289,34 @@ def aarch64svcount
def spirvbuiltin : ValueType<0, 200>; // SPIR-V's builtin type

let isNormalValueType = false in {
def token : ValueType<0, 248>; // TokenTy
def MetadataVT : ValueType<0, 249> { // Metadata
def token : ValueType<0, 16376>; // TokenTy
def MetadataVT : ValueType<0, 16377> { // Metadata
let LLVMName = "Metadata";
}

// Pseudo valuetype mapped to the current pointer size to any address space.
// Should only be used in TableGen.
def iPTRAny : VTAny<250>;
def iPTRAny : VTAny<16378>;

// Pseudo valuetype to represent "vector of any size"
// Should only be used in TableGen.
def vAny : VTAny<251>;
def vAny : VTAny<16379>;

// Pseudo valuetype to represent "float of any format"
// Should only be used in TableGen.
def fAny : VTAny<252>;
def fAny : VTAny<16380>;

// Pseudo valuetype to represent "integer of any bit width"
// Should only be used in TableGen.
def iAny : VTAny<253>;
def iAny : VTAny<16381>;

// Pseudo valuetype mapped to the current pointer size.
// Should only be used in TableGen.
def iPTR : ValueType<0, 254>;
def iPTR : ValueType<0, 16382>;

// Pseudo valuetype to represent "any type of any size".
// Should only be used in TableGen.
def Any : VTAny<255>;
def Any : VTAny<16383>;

} // isNormalValueType = false

Expand Down
2 changes: 1 addition & 1 deletion llvm/include/llvm/CodeGenTypes/MachineValueType.h
Original file line number Diff line number Diff line change
Expand Up @@ -33,7 +33,7 @@ namespace llvm {
/// type can be represented by an MVT.
class MVT {
public:
enum SimpleValueType : uint8_t {
enum SimpleValueType : uint16_t {
// Simple value types that aren't explicitly part of this enumeration
// are considered extended value types.
INVALID_SIMPLE_VALUE_TYPE = 0,
Expand Down
45 changes: 25 additions & 20 deletions llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2617,6 +2617,17 @@ GetVBR(uint64_t Val, const unsigned char *MatcherTable, unsigned &Idx) {
return Val;
}

/// getSimpleVT - Decode a value in MatcherTable, if it's a VBR encoded value,
/// use GetVBR to decode it.
LLVM_ATTRIBUTE_ALWAYS_INLINE static MVT::SimpleValueType
getSimpleVT(const unsigned char *MatcherTable, unsigned &MatcherIndex) {
unsigned SimpleVT = MatcherTable[MatcherIndex++];
if (SimpleVT & 128)
SimpleVT = GetVBR(SimpleVT, MatcherTable, MatcherIndex);

return static_cast<MVT::SimpleValueType>(SimpleVT);
}

void SelectionDAGISel::Select_JUMP_TABLE_DEBUG_INFO(SDNode *N) {
SDLoc dl(N);
CurDAG->SelectNodeTo(N, TargetOpcode::JUMP_TABLE_DEBUG_INFO, MVT::Glue,
Expand Down Expand Up @@ -2896,8 +2907,7 @@ CheckChild2CondCode(const unsigned char *MatcherTable, unsigned &MatcherIndex,
LLVM_ATTRIBUTE_ALWAYS_INLINE static bool
CheckValueType(const unsigned char *MatcherTable, unsigned &MatcherIndex,
SDValue N, const TargetLowering *TLI, const DataLayout &DL) {
MVT::SimpleValueType VT =
static_cast<MVT::SimpleValueType>(MatcherTable[MatcherIndex++]);
MVT::SimpleValueType VT = getSimpleVT(MatcherTable, MatcherIndex);
if (cast<VTSDNode>(N)->getVT() == VT)
return true;

Expand Down Expand Up @@ -3027,17 +3037,16 @@ static unsigned IsPredicateKnownToFail(const unsigned char *Table,
VT = MVT::i64;
break;
default:
VT = static_cast<MVT::SimpleValueType>(Table[Index++]);
VT = getSimpleVT(Table, Index);
break;
}
Result = !::CheckType(VT, N, SDISel.TLI, SDISel.CurDAG->getDataLayout());
return Index;
}
case SelectionDAGISel::OPC_CheckTypeRes: {
unsigned Res = Table[Index++];
Result = !::CheckType(static_cast<MVT::SimpleValueType>(Table[Index++]),
N.getValue(Res), SDISel.TLI,
SDISel.CurDAG->getDataLayout());
Result = !::CheckType(getSimpleVT(Table, Index), N.getValue(Res),
SDISel.TLI, SDISel.CurDAG->getDataLayout());
return Index;
}
case SelectionDAGISel::OPC_CheckChild0Type:
Expand Down Expand Up @@ -3075,7 +3084,7 @@ static unsigned IsPredicateKnownToFail(const unsigned char *Table,
VT = MVT::i64;
ChildNo = Opcode - SelectionDAGISel::OPC_CheckChild0TypeI64;
} else {
VT = static_cast<MVT::SimpleValueType>(Table[Index++]);
VT = getSimpleVT(Table, Index);
ChildNo = Opcode - SelectionDAGISel::OPC_CheckChild0Type;
}
Result = !::CheckChildType(VT, N, SDISel.TLI,
Expand Down Expand Up @@ -3579,7 +3588,7 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
VT = MVT::i64;
break;
default:
VT = static_cast<MVT::SimpleValueType>(MatcherTable[MatcherIndex++]);
VT = getSimpleVT(MatcherTable, MatcherIndex);
break;
}
if (!::CheckType(VT, N, TLI, CurDAG->getDataLayout()))
Expand All @@ -3588,9 +3597,8 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,

case OPC_CheckTypeRes: {
unsigned Res = MatcherTable[MatcherIndex++];
if (!::CheckType(
static_cast<MVT::SimpleValueType>(MatcherTable[MatcherIndex++]),
N.getValue(Res), TLI, CurDAG->getDataLayout()))
if (!::CheckType(getSimpleVT(MatcherTable, MatcherIndex), N.getValue(Res),
TLI, CurDAG->getDataLayout()))
break;
continue;
}
Expand Down Expand Up @@ -3637,8 +3645,7 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
CaseSize = GetVBR(CaseSize, MatcherTable, MatcherIndex);
if (CaseSize == 0) break;

MVT CaseVT =
static_cast<MVT::SimpleValueType>(MatcherTable[MatcherIndex++]);
MVT CaseVT = getSimpleVT(MatcherTable, MatcherIndex);
if (CaseVT == MVT::iPTR)
CaseVT = TLI->getPointerTy(CurDAG->getDataLayout());

Expand Down Expand Up @@ -3694,7 +3701,7 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
VT = MVT::i64;
ChildNo = Opcode - SelectionDAGISel::OPC_CheckChild0TypeI64;
} else {
VT = static_cast<MVT::SimpleValueType>(MatcherTable[MatcherIndex++]);
VT = getSimpleVT(MatcherTable, MatcherIndex);
ChildNo = Opcode - SelectionDAGISel::OPC_CheckChild0Type;
}
if (!::CheckChildType(VT, N, TLI, CurDAG->getDataLayout(), ChildNo))
Expand Down Expand Up @@ -3788,7 +3795,7 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
VT = MVT::i64;
break;
default:
VT = static_cast<MVT::SimpleValueType>(MatcherTable[MatcherIndex++]);
VT = getSimpleVT(MatcherTable, MatcherIndex);
break;
}
int64_t Val = MatcherTable[MatcherIndex++];
Expand All @@ -3812,7 +3819,7 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
VT = MVT::i64;
break;
default:
VT = static_cast<MVT::SimpleValueType>(MatcherTable[MatcherIndex++]);
VT = getSimpleVT(MatcherTable, MatcherIndex);
break;
}
unsigned RegNo = MatcherTable[MatcherIndex++];
Expand All @@ -3824,8 +3831,7 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
// For targets w/ more than 256 register names, the register enum
// values are stored in two bytes in the matcher table (just like
// opcodes).
MVT::SimpleValueType VT =
static_cast<MVT::SimpleValueType>(MatcherTable[MatcherIndex++]);
MVT::SimpleValueType VT = getSimpleVT(MatcherTable, MatcherIndex);
unsigned RegNo = MatcherTable[MatcherIndex++];
RegNo |= MatcherTable[MatcherIndex++] << 8;
RecordedNodes.push_back(std::pair<SDValue, SDNode*>(
Expand Down Expand Up @@ -4063,8 +4069,7 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
NumVTs = MatcherTable[MatcherIndex++];
SmallVector<EVT, 4> VTs;
for (unsigned i = 0; i != NumVTs; ++i) {
MVT::SimpleValueType VT =
static_cast<MVT::SimpleValueType>(MatcherTable[MatcherIndex++]);
MVT::SimpleValueType VT = getSimpleVT(MatcherTable, MatcherIndex);
if (VT == MVT::iPTR)
VT = TLI->getPointerTy(CurDAG->getDataLayout()).SimpleTy;
VTs.push_back(VT);
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/TableGen/dag-isel-regclass-emit-enum.td
Original file line number Diff line number Diff line change
Expand Up @@ -27,13 +27,13 @@ def GPRAbove127 : RegisterClass<"TestTarget", [i32], 32,
// CHECK-NEXT: OPC_CheckChild1Integer, 0,
// CHECK-NEXT: OPC_EmitInteger32, 0|128,2/*256*/,
// CHECK-NEXT: OPC_MorphNodeTo1None, TARGET_VAL(TargetOpcode::COPY_TO_REGCLASS),
// CHECK-NEXT: MVT::i32, 2/*#Ops*/, 1, 0,
// CHECK-NEXT: /*MVT::i32*/7, 2/*#Ops*/, 1, 0,
def : Pat<(i32 (add i32:$src, (i32 0))),
(COPY_TO_REGCLASS GPRAbove127, GPR0:$src)>;

// CHECK: OPC_CheckChild1Integer, 2,
// CHECK-NEXT: OPC_EmitStringInteger32, TestNamespace::GPR127RegClassID,
// CHECK-NEXT: OPC_MorphNodeTo1None, TARGET_VAL(TargetOpcode::COPY_TO_REGCLASS),
// CHECK-NEXT: MVT::i32, 2/*#Ops*/, 1, 0,
// CHECK-NEXT: /*MVT::i32*/7, 2/*#Ops*/, 1, 0,
def : Pat<(i32 (add i32:$src, (i32 1))),
(COPY_TO_REGCLASS GPR127, GPR0:$src)>;
8 changes: 4 additions & 4 deletions llvm/utils/TableGen/Common/CodeGenDAGPatterns.h
Original file line number Diff line number Diff line change
Expand Up @@ -48,15 +48,15 @@ class CodeGenDAGPatterns;
using TreePatternNodePtr = IntrusiveRefCntPtr<TreePatternNode>;

/// This represents a set of MVTs. Since the underlying type for the MVT
/// is uint8_t, there are at most 256 values. To reduce the number of memory
/// is uint16_t, there are at most 65536 values. To reduce the number of memory
/// allocations and deallocations, represent the set as a sequence of bits.
/// To reduce the allocations even further, make MachineValueTypeSet own
/// the storage and use std::array as the bit container.
struct MachineValueTypeSet {
static_assert(std::is_same<std::underlying_type_t<MVT::SimpleValueType>,
uint8_t>::value,
"Change uint8_t here to the SimpleValueType's type");
static unsigned constexpr Capacity = std::numeric_limits<uint8_t>::max() + 1;
uint16_t>::value,
"Change uint16_t here to the SimpleValueType's type");
static unsigned constexpr Capacity = std::numeric_limits<uint16_t>::max() + 1;
using WordType = uint64_t;
static unsigned constexpr WordWidth = CHAR_BIT * sizeof(WordType);
static unsigned constexpr NumWords = Capacity / WordWidth;
Expand Down
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