Few improvements related to CPU cache line size and padding #37
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Bug #79636: CACHE_LINE_SIZE should be 128 on AArch64 Bug #79637: Hard-coded cache line size Bug #79638: Reconcile CACHE_LINE_SIZE with CPU_LEVEL1_DCACHE_LINESIZE - changed CPU_LEVEL1_DCACHE_LINESIZE to default to 128 bytes on POWER and AArch64 architectures in cases when no value could be detected by CMake using getconf - changed pfs_global.h to assume CPU_LEVEL1_DCACHE_LINESIZE is always defined (and throw a compile-time error if it's not) - changed CACHE_LINE_SIZE definition in ut0counter.h to be an alias of CPU_LEVEL1_DCACHE_LINESIZE - changed a number of hard-coded 64-byte cache line size values in the InnoDB code - fixed insufficient padding for srv_conc members in srv0conc.cc
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Hi, thank you for your contribution. Please confirm this code is submitted under the terms of the OCA (Oracle's Contribution Agreement) you have previously signed by cutting and pasting the following text as a comment: |
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I confirm the code being submitted is offered under the terms of the OCA, and that I am authorized to contribute it. |
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Hi, thank you for your contribution. Your code has been assigned to an internal queue. Please follow |
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thanks @akopytov |
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I made a minor change to the patch fixing the compilation error on systems where |
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in storage/perfschema/pfs_global.h is there a reason PFS_ALIGNEMENT wasn't defined to CPU_LEVEL1_DCACHE_LINESIZE? |
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No reason, just an oversight. I'll fix. |
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Submitted #66. Thanks. |
Summary: A straightforward implementation of Index Condition Pushdown Test Plan: mtr t/rocksdb_icp.test Reviewers: maykov, hermanlee4, jonahcohen, jtolmer, yoshinorim Reviewed By: yoshinorim Differential Revision: https://reviews.facebook.net/D35181
Summary: A straightforward implementation of Index Condition Pushdown Test Plan: mtr t/rocksdb_icp.test Reviewers: maykov, hermanlee4, jonahcohen, jtolmer, yoshinorim Reviewed By: yoshinorim Differential Revision: https://reviews.facebook.net/D35181
Bug #79636: CACHE_LINE_SIZE should be 128 on AArch64
Bug #79637: Hard-coded cache line size
Bug #79638: Reconcile CACHE_LINE_SIZE with CPU_LEVEL1_DCACHE_LINESIZE
Bug #79652: Suspicious padding in srv_conc_t
and AArch64 architectures in cases when no value could be detected
by CMake using getconf
defined (and throw a compile-time error if it's not)
CPU_LEVEL1_DCACHE_LINESIZE
InnoDB code