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ARM: dts: Configure system timers for omap5 and dra7
We can now init system timers using the dmtimer and 32k counter based on only devicetree data and drivers/clocksource timers. Let's configure the clocksource and clockevent, and drop the old unused platform data. As we're just dropping platform data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Since the dmtimer can use both 32k clock and system clock as the source, let's also configure the SoC specific default values. The board specific dts files can reconfigure these with assigned-clocks and assigned-clock-parents as needed. Note that similar to omap_init_time_of(), we now need to call omap_clk_init() also from omap5_realtime_timer_init(). Cc: [email protected] Cc: Grygorii Strashko <[email protected]> Cc: Keerthy <[email protected]> Cc: Lokesh Vutla <[email protected]> Cc: Rob Herring <[email protected]> Cc: Tero Kristo <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
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-290
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7 files changed

+23
-290
lines changed

‎arch/arm/boot/dts/dra7-l4.dtsi

Lines changed: 1 addition & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1143,7 +1143,6 @@
11431143

11441144
target-module@32000 { /* 0x48032000, ap 5 3e.0 */
11451145
compatible = "ti,sysc-omap4-timer", "ti,sysc";
1146-
ti,hwmods = "timer2";
11471146
reg = <0x32000 0x4>,
11481147
<0x32010 0x4>;
11491148
reg-names = "rev", "sysc";
@@ -1171,7 +1170,6 @@
11711170

11721171
target-module@34000 { /* 0x48034000, ap 7 46.0 */
11731172
compatible = "ti,sysc-omap4-timer", "ti,sysc";
1174-
ti,hwmods = "timer3";
11751173
reg = <0x34000 0x4>,
11761174
<0x34010 0x4>;
11771175
reg-names = "rev", "sysc";
@@ -1199,7 +1197,6 @@
11991197

12001198
target-module@36000 { /* 0x48036000, ap 9 4e.0 */
12011199
compatible = "ti,sysc-omap4-timer", "ti,sysc";
1202-
ti,hwmods = "timer4";
12031200
reg = <0x36000 0x4>,
12041201
<0x36010 0x4>;
12051202
reg-names = "rev", "sysc";
@@ -4295,7 +4292,6 @@
42954292

42964293
target-module@4000 { /* 0x4ae04000, ap 15 40.0 */
42974294
compatible = "ti,sysc-omap2", "ti,sysc";
4298-
ti,hwmods = "counter_32k";
42994295
reg = <0x4000 0x4>,
43004296
<0x4010 0x4>;
43014297
reg-names = "rev", "sysc";
@@ -4430,9 +4426,8 @@
44304426
};
44314427
};
44324428

4433-
target-module@8000 { /* 0x4ae18000, ap 9 30.0 */
4429+
timer1_target: target-module@8000 { /* 0x4ae18000, ap 9 30.0 */
44344430
compatible = "ti,sysc-omap4-timer", "ti,sysc";
4435-
ti,hwmods = "timer1";
44364431
reg = <0x8000 0x4>,
44374432
<0x8010 0x4>;
44384433
reg-names = "rev", "sysc";

‎arch/arm/boot/dts/dra7.dtsi

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1044,3 +1044,13 @@
10441044
reg = <0x1c00 0x60>;
10451045
};
10461046
};
1047+
1048+
/* Preferred always-on timer for clockevent */
1049+
&timer1_target {
1050+
ti,no-reset-on-init;
1051+
ti,no-idle;
1052+
timer@0 {
1053+
assigned-clocks = <&wkupaon_clkctrl DRA7_TIMER1_CLKCTRL 24>;
1054+
assigned-clock-parents = <&sys_32k_ck>;
1055+
};
1056+
};

‎arch/arm/boot/dts/omap5-l4.dtsi

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -2150,7 +2150,6 @@
21502150

21512151
target-module@4000 { /* 0x4ae04000, ap 17 20.0 */
21522152
compatible = "ti,sysc-omap2", "ti,sysc";
2153-
ti,hwmods = "counter_32k";
21542153
reg = <0x4000 0x4>,
21552154
<0x4010 0x4>;
21562155
reg-names = "rev", "sysc";
@@ -2336,9 +2335,8 @@
23362335
};
23372336
};
23382337

2339-
target-module@8000 { /* 0x4ae18000, ap 9 18.0 */
2338+
timer1_target: target-module@8000 { /* 0x4ae18000, ap 9 18.0 */
23402339
compatible = "ti,sysc-omap4-timer", "ti,sysc";
2341-
ti,hwmods = "timer1";
23422340
reg = <0x8000 0x4>,
23432341
<0x8010 0x4>;
23442342
reg-names = "rev", "sysc";

‎arch/arm/boot/dts/omap5.dtsi

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -581,3 +581,13 @@
581581
#reset-cells = <1>;
582582
};
583583
};
584+
585+
/* Preferred always-on timer for clockevent */
586+
&timer1_target {
587+
ti,no-reset-on-init;
588+
ti,no-idle;
589+
timer@0 {
590+
assigned-clocks = <&wkupaon_clkctrl OMAP5_TIMER1_CLKCTRL 24>;
591+
assigned-clock-parents = <&sys_32k_ck>;
592+
};
593+
};

‎arch/arm/mach-omap2/omap_hwmod_54xx_data.c

Lines changed: 0 additions & 89 deletions
Original file line numberDiff line numberDiff line change
@@ -193,39 +193,6 @@ static struct omap_hwmod omap54xx_mpu_private_hwmod = {
193193
},
194194
};
195195

196-
/*
197-
* 'counter' class
198-
* 32-bit ordinary counter, clocked by the falling edge of the 32 khz clock
199-
*/
200-
201-
static struct omap_hwmod_class_sysconfig omap54xx_counter_sysc = {
202-
.rev_offs = 0x0000,
203-
.sysc_offs = 0x0010,
204-
.sysc_flags = SYSC_HAS_SIDLEMODE,
205-
.idlemodes = (SIDLE_FORCE | SIDLE_NO),
206-
.sysc_fields = &omap_hwmod_sysc_type1,
207-
};
208-
209-
static struct omap_hwmod_class omap54xx_counter_hwmod_class = {
210-
.name = "counter",
211-
.sysc = &omap54xx_counter_sysc,
212-
};
213-
214-
/* counter_32k */
215-
static struct omap_hwmod omap54xx_counter_32k_hwmod = {
216-
.name = "counter_32k",
217-
.class = &omap54xx_counter_hwmod_class,
218-
.clkdm_name = "wkupaon_clkdm",
219-
.flags = HWMOD_SWSUP_SIDLE,
220-
.main_clk = "wkupaon_iclk_mux",
221-
.prcm = {
222-
.omap4 = {
223-
.clkctrl_offs = OMAP54XX_CM_WKUPAON_COUNTER_32K_CLKCTRL_OFFSET,
224-
.context_offs = OMAP54XX_RM_WKUPAON_COUNTER_32K_CONTEXT_OFFSET,
225-
},
226-
},
227-
};
228-
229196
/*
230197
* 'emif' class
231198
* external memory interface no1 (wrapper)
@@ -299,44 +266,6 @@ static struct omap_hwmod omap54xx_mpu_hwmod = {
299266
},
300267
};
301268

302-
303-
/*
304-
* 'timer' class
305-
* general purpose timer module with accurate 1ms tick
306-
* This class contains several variants: ['timer_1ms', 'timer']
307-
*/
308-
309-
static struct omap_hwmod_class_sysconfig omap54xx_timer_1ms_sysc = {
310-
.rev_offs = 0x0000,
311-
.sysc_offs = 0x0010,
312-
.sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_RESET_STATUS |
313-
SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),
314-
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
315-
SIDLE_SMART_WKUP),
316-
.sysc_fields = &omap_hwmod_sysc_type2,
317-
};
318-
319-
static struct omap_hwmod_class omap54xx_timer_1ms_hwmod_class = {
320-
.name = "timer",
321-
.sysc = &omap54xx_timer_1ms_sysc,
322-
};
323-
324-
/* timer1 */
325-
static struct omap_hwmod omap54xx_timer1_hwmod = {
326-
.name = "timer1",
327-
.class = &omap54xx_timer_1ms_hwmod_class,
328-
.clkdm_name = "wkupaon_clkdm",
329-
.main_clk = "timer1_gfclk_mux",
330-
.flags = HWMOD_SET_DEFAULT_CLOCKACT,
331-
.prcm = {
332-
.omap4 = {
333-
.clkctrl_offs = OMAP54XX_CM_WKUPAON_TIMER1_CLKCTRL_OFFSET,
334-
.context_offs = OMAP54XX_RM_WKUPAON_TIMER1_CONTEXT_OFFSET,
335-
.modulemode = MODULEMODE_SWCTRL,
336-
},
337-
},
338-
};
339-
340269
/*
341270
* 'usb_host_hs' class
342271
* high-speed multi-port usb host controller
@@ -666,14 +595,6 @@ static struct omap_hwmod_ocp_if omap54xx_mpu__mpu_private = {
666595
.user = OCP_USER_MPU | OCP_USER_SDMA,
667596
};
668597

669-
/* l4_wkup -> counter_32k */
670-
static struct omap_hwmod_ocp_if omap54xx_l4_wkup__counter_32k = {
671-
.master = &omap54xx_l4_wkup_hwmod,
672-
.slave = &omap54xx_counter_32k_hwmod,
673-
.clk = "wkupaon_iclk_mux",
674-
.user = OCP_USER_MPU | OCP_USER_SDMA,
675-
};
676-
677598
/* mpu -> emif1 */
678599
static struct omap_hwmod_ocp_if omap54xx_mpu__emif1 = {
679600
.master = &omap54xx_mpu_hwmod,
@@ -698,14 +619,6 @@ static struct omap_hwmod_ocp_if omap54xx_l4_cfg__mpu = {
698619
.user = OCP_USER_MPU | OCP_USER_SDMA,
699620
};
700621

701-
/* l4_wkup -> timer1 */
702-
static struct omap_hwmod_ocp_if omap54xx_l4_wkup__timer1 = {
703-
.master = &omap54xx_l4_wkup_hwmod,
704-
.slave = &omap54xx_timer1_hwmod,
705-
.clk = "wkupaon_iclk_mux",
706-
.user = OCP_USER_MPU | OCP_USER_SDMA,
707-
};
708-
709622
/* l4_cfg -> usb_host_hs */
710623
static struct omap_hwmod_ocp_if omap54xx_l4_cfg__usb_host_hs = {
711624
.master = &omap54xx_l4_cfg_hwmod,
@@ -747,11 +660,9 @@ static struct omap_hwmod_ocp_if *omap54xx_hwmod_ocp_ifs[] __initdata = {
747660
&omap54xx_l3_main_2__l4_per,
748661
&omap54xx_l3_main_1__l4_wkup,
749662
&omap54xx_mpu__mpu_private,
750-
&omap54xx_l4_wkup__counter_32k,
751663
&omap54xx_mpu__emif1,
752664
&omap54xx_mpu__emif2,
753665
&omap54xx_l4_cfg__mpu,
754-
&omap54xx_l4_wkup__timer1,
755666
&omap54xx_l4_cfg__usb_host_hs,
756667
&omap54xx_l4_cfg__usb_tll_hs,
757668
&omap54xx_l4_cfg__usb_otg_ss,

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