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55 | 55 | i2c1 = &i2c1;
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56 | 56 | i2c2 = &i2c2;
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57 | 57 | mshc0 = &emmc;
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| 58 | + mshc1 = &sdmmc; |
| 59 | + mshc2 = &sdio; |
58 | 60 | serial0 = &uart0;
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59 | 61 | serial1 = &uart1;
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60 | 62 | serial2 = &uart2;
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184 | 186 | status = "disabled";
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185 | 187 | };
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186 | 188 |
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| 189 | + sdmmc: dwmmc@10214000 { |
| 190 | + compatible = "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc"; |
| 191 | + reg = <0x10214000 0x4000>; |
| 192 | + clock-frequency = <37500000>; |
| 193 | + clock-freq-min-max = <400000 37500000>; |
| 194 | + clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>; |
| 195 | + clock-names = "biu", "ciu"; |
| 196 | + fifo-depth = <0x100>; |
| 197 | + interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; |
| 198 | + status = "disabled"; |
| 199 | + }; |
| 200 | + |
| 201 | + sdio: dwmmc@10218000 { |
| 202 | + compatible = "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc"; |
| 203 | + reg = <0x10218000 0x4000>; |
| 204 | + clock-freq-min-max = <400000 37500000>; |
| 205 | + clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>, |
| 206 | + <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>; |
| 207 | + clock-names = "biu", "ciu", "ciu_drv", "ciu_sample"; |
| 208 | + fifo-depth = <0x100>; |
| 209 | + interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; |
| 210 | + status = "disabled"; |
| 211 | + }; |
| 212 | + |
187 | 213 | emmc: dwmmc@1021c000 {
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188 | 214 | compatible = "rockchip,rk3288-dw-mshc";
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189 | 215 | reg = <0x1021c000 0x4000>;
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459 | 485 | };
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460 | 486 | };
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461 | 487 |
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| 488 | + sdmmc { |
| 489 | + sdmmc_clk: sdmmc-clk { |
| 490 | + rockchip,pins = <1 16 RK_FUNC_1 &pcfg_pull_none>; |
| 491 | + }; |
| 492 | + |
| 493 | + sdmmc_cmd: sdmmc-cmd { |
| 494 | + rockchip,pins = <1 15 RK_FUNC_1 &pcfg_pull_default>; |
| 495 | + }; |
| 496 | + |
| 497 | + sdmmc_cd: sdmcc-cd { |
| 498 | + rockchip,pins = <1 17 RK_FUNC_1 &pcfg_pull_default>; |
| 499 | + }; |
| 500 | + |
| 501 | + sdmmc_bus1: sdmmc-bus1 { |
| 502 | + rockchip,pins = <1 18 RK_FUNC_1 &pcfg_pull_default>; |
| 503 | + }; |
| 504 | + |
| 505 | + sdmmc_bus4: sdmmc-bus4 { |
| 506 | + rockchip,pins = <1 18 RK_FUNC_1 &pcfg_pull_default>, |
| 507 | + <1 19 RK_FUNC_1 &pcfg_pull_default>, |
| 508 | + <1 20 RK_FUNC_1 &pcfg_pull_default>, |
| 509 | + <1 21 RK_FUNC_1 &pcfg_pull_default>; |
| 510 | + }; |
| 511 | + }; |
| 512 | + |
| 513 | + sdio { |
| 514 | + sdio_bus1: sdio-bus1 { |
| 515 | + rockchip,pins = <0 11 RK_FUNC_1 &pcfg_pull_default>; |
| 516 | + }; |
| 517 | + |
| 518 | + sdio_bus4: sdio-bus4 { |
| 519 | + rockchip,pins = <0 11 RK_FUNC_1 &pcfg_pull_default>, |
| 520 | + <0 12 RK_FUNC_1 &pcfg_pull_default>, |
| 521 | + <0 13 RK_FUNC_1 &pcfg_pull_default>, |
| 522 | + <0 14 RK_FUNC_1 &pcfg_pull_default>; |
| 523 | + }; |
| 524 | + |
| 525 | + sdio_cmd: sdio-cmd { |
| 526 | + rockchip,pins = <0 8 RK_FUNC_1 &pcfg_pull_default>; |
| 527 | + }; |
| 528 | + |
| 529 | + sdio_clk: sdio-clk { |
| 530 | + rockchip,pins = <0 9 RK_FUNC_1 &pcfg_pull_none>; |
| 531 | + }; |
| 532 | + }; |
| 533 | + |
462 | 534 | emmc {
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463 | 535 | /*
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464 | 536 | * We run eMMC at max speed; bump up drive strength.
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