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ice: Introduce ice_get_phy_model() wrapper
[ Upstream commit 5e07764 ] Introduce ice_get_phy_model() to improve code readability Signed-off-by: Sergey Temerkhanov <[email protected]> Reviewed-by: Przemek Kitszel <[email protected]> Reviewed-by: Simon Horman <[email protected]> Tested-by: Pucha Himasekhar Reddy <[email protected]> (A Contingent worker at Intel) Signed-off-by: Tony Nguyen <[email protected]> Stable-dep-of: 258f5f9 ("ice: Add correct PHY lane assignment") Signed-off-by: Sasha Levin <[email protected]> (cherry picked from commit 922af90ffb77e4546f9ea279d10e547d25bbb9d7) Signed-off-by: Jack Vogel <[email protected]>
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‎drivers/net/ethernet/intel/ice/ice.h

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1047,5 +1047,10 @@ static inline void ice_clear_rdma_cap(struct ice_pf *pf)
10471047
clear_bit(ICE_FLAG_RDMA_ENA, pf->flags);
10481048
}
10491049

1050+
static inline enum ice_phy_model ice_get_phy_model(const struct ice_hw *hw)
1051+
{
1052+
return hw->ptp.phy_model;
1053+
}
1054+
10501055
extern const struct xdp_metadata_ops ice_xdp_md_ops;
10511056
#endif /* _ICE_H_ */

‎drivers/net/ethernet/intel/ice/ice_ptp.c

Lines changed: 9 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -1363,7 +1363,7 @@ ice_ptp_port_phy_stop(struct ice_ptp_port *ptp_port)
13631363

13641364
mutex_lock(&ptp_port->ps_lock);
13651365

1366-
switch (hw->ptp.phy_model) {
1366+
switch (ice_get_phy_model(hw)) {
13671367
case ICE_PHY_ETH56G:
13681368
err = ice_stop_phy_timer_eth56g(hw, port, true);
13691369
break;
@@ -1409,7 +1409,7 @@ ice_ptp_port_phy_restart(struct ice_ptp_port *ptp_port)
14091409

14101410
mutex_lock(&ptp_port->ps_lock);
14111411

1412-
switch (hw->ptp.phy_model) {
1412+
switch (ice_get_phy_model(hw)) {
14131413
case ICE_PHY_ETH56G:
14141414
err = ice_start_phy_timer_eth56g(hw, port);
14151415
break;
@@ -1480,8 +1480,7 @@ void ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup)
14801480
/* Skip HW writes if reset is in progress */
14811481
if (pf->hw.reset_ongoing)
14821482
return;
1483-
1484-
switch (hw->ptp.phy_model) {
1483+
switch (ice_get_phy_model(hw)) {
14851484
case ICE_PHY_E810:
14861485
/* Do not reconfigure E810 PHY */
14871486
return;
@@ -1514,7 +1513,7 @@ static int ice_ptp_cfg_phy_interrupt(struct ice_pf *pf, bool ena, u32 threshold)
15141513

15151514
ice_ptp_reset_ts_memory(hw);
15161515

1517-
switch (hw->ptp.phy_model) {
1516+
switch (ice_get_phy_model(hw)) {
15181517
case ICE_PHY_ETH56G: {
15191518
int port;
15201519

@@ -1553,7 +1552,7 @@ static int ice_ptp_cfg_phy_interrupt(struct ice_pf *pf, bool ena, u32 threshold)
15531552
case ICE_PHY_UNSUP:
15541553
default:
15551554
dev_warn(dev, "%s: Unexpected PHY model %d\n", __func__,
1556-
hw->ptp.phy_model);
1555+
ice_get_phy_model(hw));
15571556
return -EOPNOTSUPP;
15581557
}
15591558
}
@@ -2059,7 +2058,7 @@ ice_ptp_settime64(struct ptp_clock_info *info, const struct timespec64 *ts)
20592058
/* For Vernier mode on E82X, we need to recalibrate after new settime.
20602059
* Start with marking timestamps as invalid.
20612060
*/
2062-
if (hw->ptp.phy_model == ICE_PHY_E82X) {
2061+
if (ice_get_phy_model(hw) == ICE_PHY_E82X) {
20632062
err = ice_ptp_clear_phy_offset_ready_e82x(hw);
20642063
if (err)
20652064
dev_warn(ice_pf_to_dev(pf), "Failed to mark timestamps as invalid before settime\n");
@@ -2083,7 +2082,7 @@ ice_ptp_settime64(struct ptp_clock_info *info, const struct timespec64 *ts)
20832082
ice_ptp_enable_all_clkout(pf);
20842083

20852084
/* Recalibrate and re-enable timestamp blocks for E822/E823 */
2086-
if (hw->ptp.phy_model == ICE_PHY_E82X)
2085+
if (ice_get_phy_model(hw) == ICE_PHY_E82X)
20872086
ice_ptp_restart_all_phy(pf);
20882087
exit:
20892088
if (err) {
@@ -3209,7 +3208,7 @@ static int ice_ptp_init_port(struct ice_pf *pf, struct ice_ptp_port *ptp_port)
32093208

32103209
mutex_init(&ptp_port->ps_lock);
32113210

3212-
switch (hw->ptp.phy_model) {
3211+
switch (ice_get_phy_model(hw)) {
32133212
case ICE_PHY_ETH56G:
32143213
return ice_ptp_init_tx_eth56g(pf, &ptp_port->tx,
32153214
ptp_port->port_num);
@@ -3307,7 +3306,7 @@ static void ice_ptp_remove_auxbus_device(struct ice_pf *pf)
33073306
*/
33083307
static void ice_ptp_init_tx_interrupt_mode(struct ice_pf *pf)
33093308
{
3310-
switch (pf->hw.ptp.phy_model) {
3309+
switch (ice_get_phy_model(&pf->hw)) {
33113310
case ICE_PHY_E82X:
33123311
/* E822 based PHY has the clock owner process the interrupt
33133312
* for all ports.

‎drivers/net/ethernet/intel/ice/ice_ptp_hw.c

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -804,7 +804,7 @@ static u32 ice_ptp_tmr_cmd_to_port_reg(struct ice_hw *hw,
804804
/* Certain hardware families share the same register values for the
805805
* port register and source timer register.
806806
*/
807-
switch (hw->ptp.phy_model) {
807+
switch (ice_get_phy_model(hw)) {
808808
case ICE_PHY_E810:
809809
return ice_ptp_tmr_cmd_to_src_reg(hw, cmd) & TS_CMD_MASK_E810;
810810
default:
@@ -5461,7 +5461,7 @@ void ice_ptp_init_hw(struct ice_hw *hw)
54615461
static int ice_ptp_write_port_cmd(struct ice_hw *hw, u8 port,
54625462
enum ice_ptp_tmr_cmd cmd)
54635463
{
5464-
switch (hw->ptp.phy_model) {
5464+
switch (ice_get_phy_model(hw)) {
54655465
case ICE_PHY_ETH56G:
54665466
return ice_ptp_write_port_cmd_eth56g(hw, port, cmd);
54675467
case ICE_PHY_E82X:
@@ -5526,7 +5526,7 @@ static int ice_ptp_port_cmd(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd)
55265526
u32 port;
55275527

55285528
/* PHY models which can program all ports simultaneously */
5529-
switch (hw->ptp.phy_model) {
5529+
switch (ice_get_phy_model(hw)) {
55305530
case ICE_PHY_E810:
55315531
return ice_ptp_port_cmd_e810(hw, cmd);
55325532
default:
@@ -5605,7 +5605,7 @@ int ice_ptp_init_time(struct ice_hw *hw, u64 time)
56055605

56065606
/* PHY timers */
56075607
/* Fill Rx and Tx ports and send msg to PHY */
5608-
switch (hw->ptp.phy_model) {
5608+
switch (ice_get_phy_model(hw)) {
56095609
case ICE_PHY_ETH56G:
56105610
err = ice_ptp_prep_phy_time_eth56g(hw,
56115611
(u32)(time & 0xFFFFFFFF));
@@ -5651,7 +5651,7 @@ int ice_ptp_write_incval(struct ice_hw *hw, u64 incval)
56515651
wr32(hw, GLTSYN_SHADJ_L(tmr_idx), lower_32_bits(incval));
56525652
wr32(hw, GLTSYN_SHADJ_H(tmr_idx), upper_32_bits(incval));
56535653

5654-
switch (hw->ptp.phy_model) {
5654+
switch (ice_get_phy_model(hw)) {
56555655
case ICE_PHY_ETH56G:
56565656
err = ice_ptp_prep_phy_incval_eth56g(hw, incval);
56575657
break;
@@ -5720,7 +5720,7 @@ int ice_ptp_adj_clock(struct ice_hw *hw, s32 adj)
57205720
wr32(hw, GLTSYN_SHADJ_L(tmr_idx), 0);
57215721
wr32(hw, GLTSYN_SHADJ_H(tmr_idx), adj);
57225722

5723-
switch (hw->ptp.phy_model) {
5723+
switch (ice_get_phy_model(hw)) {
57245724
case ICE_PHY_ETH56G:
57255725
err = ice_ptp_prep_phy_adj_eth56g(hw, adj);
57265726
break;
@@ -5753,7 +5753,7 @@ int ice_ptp_adj_clock(struct ice_hw *hw, s32 adj)
57535753
*/
57545754
int ice_read_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx, u64 *tstamp)
57555755
{
5756-
switch (hw->ptp.phy_model) {
5756+
switch (ice_get_phy_model(hw)) {
57575757
case ICE_PHY_ETH56G:
57585758
return ice_read_ptp_tstamp_eth56g(hw, block, idx, tstamp);
57595759
case ICE_PHY_E810:
@@ -5783,7 +5783,7 @@ int ice_read_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx, u64 *tstamp)
57835783
*/
57845784
int ice_clear_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx)
57855785
{
5786-
switch (hw->ptp.phy_model) {
5786+
switch (ice_get_phy_model(hw)) {
57875787
case ICE_PHY_ETH56G:
57885788
return ice_clear_ptp_tstamp_eth56g(hw, block, idx);
57895789
case ICE_PHY_E810:
@@ -5846,7 +5846,7 @@ static int ice_get_pf_c827_idx(struct ice_hw *hw, u8 *idx)
58465846
*/
58475847
void ice_ptp_reset_ts_memory(struct ice_hw *hw)
58485848
{
5849-
switch (hw->ptp.phy_model) {
5849+
switch (ice_get_phy_model(hw)) {
58505850
case ICE_PHY_ETH56G:
58515851
ice_ptp_reset_ts_memory_eth56g(hw);
58525852
break;
@@ -5875,7 +5875,7 @@ int ice_ptp_init_phc(struct ice_hw *hw)
58755875
/* Clear event err indications for auxiliary pins */
58765876
(void)rd32(hw, GLTSYN_STAT(src_idx));
58775877

5878-
switch (hw->ptp.phy_model) {
5878+
switch (ice_get_phy_model(hw)) {
58795879
case ICE_PHY_ETH56G:
58805880
return ice_ptp_init_phc_eth56g(hw);
58815881
case ICE_PHY_E810:
@@ -5900,7 +5900,7 @@ int ice_ptp_init_phc(struct ice_hw *hw)
59005900
*/
59015901
int ice_get_phy_tx_tstamp_ready(struct ice_hw *hw, u8 block, u64 *tstamp_ready)
59025902
{
5903-
switch (hw->ptp.phy_model) {
5903+
switch (ice_get_phy_model(hw)) {
59045904
case ICE_PHY_ETH56G:
59055905
return ice_get_phy_tx_tstamp_ready_eth56g(hw, block,
59065906
tstamp_ready);

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