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Amit Cohendavem330
Amit Cohen
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davem330
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mlxsw: Use Switch Multicast ID Register Version 2
The SMID-V2 register maps Multicast ID (MID) into a list of local ports. It is a new version of SMID in order to support 1024 bits of local_port. Add SMID-V2 register and use it instead of SMID. Signed-off-by: Amit Cohen <[email protected]> Reviewed-by: Petr Machata <[email protected]> Signed-off-by: Ido Schimmel <[email protected]> Signed-off-by: David S. Miller <[email protected]>
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‎drivers/net/ethernet/mellanox/mlxsw/reg.h

Lines changed: 47 additions & 47 deletions
Original file line numberDiff line numberDiff line change
@@ -69,52 +69,6 @@ MLXSW_REG_DEFINE(spad, MLXSW_REG_SPAD_ID, MLXSW_REG_SPAD_LEN);
6969
*/
7070
MLXSW_ITEM_BUF(reg, spad, base_mac, 0x02, 6);
7171

72-
/* SMID - Switch Multicast ID
73-
* --------------------------
74-
* The MID record maps from a MID (Multicast ID), which is a unique identifier
75-
* of the multicast group within the stacking domain, into a list of local
76-
* ports into which the packet is replicated.
77-
*/
78-
#define MLXSW_REG_SMID_ID 0x2007
79-
#define MLXSW_REG_SMID_LEN 0x240
80-
81-
MLXSW_REG_DEFINE(smid, MLXSW_REG_SMID_ID, MLXSW_REG_SMID_LEN);
82-
83-
/* reg_smid_swid
84-
* Switch partition ID.
85-
* Access: Index
86-
*/
87-
MLXSW_ITEM32(reg, smid, swid, 0x00, 24, 8);
88-
89-
/* reg_smid_mid
90-
* Multicast identifier - global identifier that represents the multicast group
91-
* across all devices.
92-
* Access: Index
93-
*/
94-
MLXSW_ITEM32(reg, smid, mid, 0x00, 0, 16);
95-
96-
/* reg_smid_port
97-
* Local port memebership (1 bit per port).
98-
* Access: RW
99-
*/
100-
MLXSW_ITEM_BIT_ARRAY(reg, smid, port, 0x20, 0x20, 1);
101-
102-
/* reg_smid_port_mask
103-
* Local port mask (1 bit per port).
104-
* Access: W
105-
*/
106-
MLXSW_ITEM_BIT_ARRAY(reg, smid, port_mask, 0x220, 0x20, 1);
107-
108-
static inline void mlxsw_reg_smid_pack(char *payload, u16 mid,
109-
u8 port, bool set)
110-
{
111-
MLXSW_REG_ZERO(smid, payload);
112-
mlxsw_reg_smid_swid_set(payload, 0);
113-
mlxsw_reg_smid_mid_set(payload, mid);
114-
mlxsw_reg_smid_port_set(payload, port, set);
115-
mlxsw_reg_smid_port_mask_set(payload, port, 1);
116-
}
117-
11872
/* SSPR - Switch System Port Record Register
11973
* -----------------------------------------
12074
* Configures the system port to local port mapping.
@@ -2105,6 +2059,52 @@ static inline void mlxsw_reg_sftr2_pack(char *payload,
21052059
mlxsw_reg_sftr2_port_mask_set(payload, port, 1);
21062060
}
21072061

2062+
/* SMID-V2 - Switch Multicast ID Version 2 Register
2063+
* ------------------------------------------------
2064+
* The MID record maps from a MID (Multicast ID), which is a unique identifier
2065+
* of the multicast group within the stacking domain, into a list of local
2066+
* ports into which the packet is replicated.
2067+
*/
2068+
#define MLXSW_REG_SMID2_ID 0x2034
2069+
#define MLXSW_REG_SMID2_LEN 0x120
2070+
2071+
MLXSW_REG_DEFINE(smid2, MLXSW_REG_SMID2_ID, MLXSW_REG_SMID2_LEN);
2072+
2073+
/* reg_smid2_swid
2074+
* Switch partition ID.
2075+
* Access: Index
2076+
*/
2077+
MLXSW_ITEM32(reg, smid2, swid, 0x00, 24, 8);
2078+
2079+
/* reg_smid2_mid
2080+
* Multicast identifier - global identifier that represents the multicast group
2081+
* across all devices.
2082+
* Access: Index
2083+
*/
2084+
MLXSW_ITEM32(reg, smid2, mid, 0x00, 0, 16);
2085+
2086+
/* reg_smid2_port
2087+
* Local port memebership (1 bit per port).
2088+
* Access: RW
2089+
*/
2090+
MLXSW_ITEM_BIT_ARRAY(reg, smid2, port, 0x20, 0x80, 1);
2091+
2092+
/* reg_smid2_port_mask
2093+
* Local port mask (1 bit per port).
2094+
* Access: WO
2095+
*/
2096+
MLXSW_ITEM_BIT_ARRAY(reg, smid2, port_mask, 0xA0, 0x80, 1);
2097+
2098+
static inline void mlxsw_reg_smid2_pack(char *payload, u16 mid, u16 port,
2099+
bool set)
2100+
{
2101+
MLXSW_REG_ZERO(smid2, payload);
2102+
mlxsw_reg_smid2_swid_set(payload, 0);
2103+
mlxsw_reg_smid2_mid_set(payload, mid);
2104+
mlxsw_reg_smid2_port_set(payload, port, set);
2105+
mlxsw_reg_smid2_port_mask_set(payload, port, 1);
2106+
}
2107+
21082108
/* CWTP - Congetion WRED ECN TClass Profile
21092109
* ----------------------------------------
21102110
* Configures the profiles for queues of egress port and traffic class
@@ -12373,7 +12373,6 @@ static inline void mlxsw_reg_sbib_pack(char *payload, u16 local_port,
1237312373
static const struct mlxsw_reg_info *mlxsw_reg_infos[] = {
1237412374
MLXSW_REG(sgcr),
1237512375
MLXSW_REG(spad),
12376-
MLXSW_REG(smid),
1237712376
MLXSW_REG(sspr),
1237812377
MLXSW_REG(sfdat),
1237912378
MLXSW_REG(sfd),
@@ -12396,6 +12395,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = {
1239612395
MLXSW_REG(spvc),
1239712396
MLXSW_REG(spevet),
1239812397
MLXSW_REG(sftr2),
12398+
MLXSW_REG(smid2),
1239912399
MLXSW_REG(cwtp),
1240012400
MLXSW_REG(cwtpm),
1240112401
MLXSW_REG(pgcr),

‎drivers/net/ethernet/mellanox/mlxsw/spectrum_switchdev.c

Lines changed: 25 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -865,17 +865,17 @@ static int mlxsw_sp_port_mc_disabled_set(struct mlxsw_sp_port *mlxsw_sp_port,
865865
static int mlxsw_sp_smid_router_port_set(struct mlxsw_sp *mlxsw_sp,
866866
u16 mid_idx, bool add)
867867
{
868-
char *smid_pl;
868+
char *smid2_pl;
869869
int err;
870870

871-
smid_pl = kmalloc(MLXSW_REG_SMID_LEN, GFP_KERNEL);
872-
if (!smid_pl)
871+
smid2_pl = kmalloc(MLXSW_REG_SMID2_LEN, GFP_KERNEL);
872+
if (!smid2_pl)
873873
return -ENOMEM;
874874

875-
mlxsw_reg_smid_pack(smid_pl, mid_idx,
876-
mlxsw_sp_router_port(mlxsw_sp), add);
877-
err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(smid), smid_pl);
878-
kfree(smid_pl);
875+
mlxsw_reg_smid2_pack(smid2_pl, mid_idx,
876+
mlxsw_sp_router_port(mlxsw_sp), add);
877+
err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(smid2), smid2_pl);
878+
kfree(smid2_pl);
879879
return err;
880880
}
881881

@@ -1477,47 +1477,47 @@ static int mlxsw_sp_port_smid_full_entry(struct mlxsw_sp *mlxsw_sp, u16 mid_idx,
14771477
long *ports_bitmap,
14781478
bool set_router_port)
14791479
{
1480-
char *smid_pl;
1480+
char *smid2_pl;
14811481
int err, i;
14821482

1483-
smid_pl = kmalloc(MLXSW_REG_SMID_LEN, GFP_KERNEL);
1484-
if (!smid_pl)
1483+
smid2_pl = kmalloc(MLXSW_REG_SMID2_LEN, GFP_KERNEL);
1484+
if (!smid2_pl)
14851485
return -ENOMEM;
14861486

1487-
mlxsw_reg_smid_pack(smid_pl, mid_idx, 0, false);
1487+
mlxsw_reg_smid2_pack(smid2_pl, mid_idx, 0, false);
14881488
for (i = 1; i < mlxsw_core_max_ports(mlxsw_sp->core); i++) {
14891489
if (mlxsw_sp->ports[i])
1490-
mlxsw_reg_smid_port_mask_set(smid_pl, i, 1);
1490+
mlxsw_reg_smid2_port_mask_set(smid2_pl, i, 1);
14911491
}
14921492

1493-
mlxsw_reg_smid_port_mask_set(smid_pl,
1494-
mlxsw_sp_router_port(mlxsw_sp), 1);
1493+
mlxsw_reg_smid2_port_mask_set(smid2_pl,
1494+
mlxsw_sp_router_port(mlxsw_sp), 1);
14951495

14961496
for_each_set_bit(i, ports_bitmap, mlxsw_core_max_ports(mlxsw_sp->core))
1497-
mlxsw_reg_smid_port_set(smid_pl, i, 1);
1497+
mlxsw_reg_smid2_port_set(smid2_pl, i, 1);
14981498

1499-
mlxsw_reg_smid_port_set(smid_pl, mlxsw_sp_router_port(mlxsw_sp),
1500-
set_router_port);
1499+
mlxsw_reg_smid2_port_set(smid2_pl, mlxsw_sp_router_port(mlxsw_sp),
1500+
set_router_port);
15011501

1502-
err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(smid), smid_pl);
1503-
kfree(smid_pl);
1502+
err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(smid2), smid2_pl);
1503+
kfree(smid2_pl);
15041504
return err;
15051505
}
15061506

15071507
static int mlxsw_sp_port_smid_set(struct mlxsw_sp_port *mlxsw_sp_port,
15081508
u16 mid_idx, bool add)
15091509
{
15101510
struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1511-
char *smid_pl;
1511+
char *smid2_pl;
15121512
int err;
15131513

1514-
smid_pl = kmalloc(MLXSW_REG_SMID_LEN, GFP_KERNEL);
1515-
if (!smid_pl)
1514+
smid2_pl = kmalloc(MLXSW_REG_SMID2_LEN, GFP_KERNEL);
1515+
if (!smid2_pl)
15161516
return -ENOMEM;
15171517

1518-
mlxsw_reg_smid_pack(smid_pl, mid_idx, mlxsw_sp_port->local_port, add);
1519-
err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(smid), smid_pl);
1520-
kfree(smid_pl);
1518+
mlxsw_reg_smid2_pack(smid2_pl, mid_idx, mlxsw_sp_port->local_port, add);
1519+
err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(smid2), smid2_pl);
1520+
kfree(smid2_pl);
15211521
return err;
15221522
}
15231523

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