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shreyasbpmpe
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powerpc/powernv: Introduce sysfs control for fastsleep workaround behavior
Fastsleep is one of the idle state which cpuidle subsystem currently uses on power8 machines. In this state L2 cache is brought down to a threshold voltage. Therefore when the core is in fastsleep, the communication between L2 and L3 needs to be fenced. But there is a bug in the current power8 chips surrounding this fencing. OPAL provides a workaround which precludes the possibility of hitting this bug. But running with this workaround applied causes checkstop if any correctable error in L2 cache directory is detected. Hence OPAL also provides a way to undo the workaround. In the existing implementation, workaround is applied by the last thread of the core entering fastsleep and undone by the first thread waking up. But this has a performance cost. These OPAL calls account for roughly 4000 cycles everytime the core has to enter or wakeup from fastsleep. This patch introduces a sysfs attribute (fastsleep_workaround_applyonce) to choose the behavior of this workaround. By default, fastsleep_workaround_applyonce = 0. In this case, workaround is applied/undone everytime the core enters/exits fastsleep. fastsleep_workaround_applyonce = 1. In this case the workaround is applied once on all the cores and never undone. This can be triggered by echo 1 > /sys/devices/system/cpu/fastsleep_workaround_applyonce For simplicity this attribute can be modified only once. Implying, once fastsleep_workaround_applyonce is changed to 1, it cannot be reverted to the default state. Signed-off-by: Shreyas B. Prabhu <[email protected]> Reviewed-by: Preeti U Murthy <[email protected]> Signed-off-by: Michael Ellerman <[email protected]>
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arch/powerpc/include/asm/opal-api.h

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -165,6 +165,13 @@
165165
#define OPAL_PM_WINKLE_ENABLED 0x00040000
166166
#define OPAL_PM_SLEEP_ENABLED_ER1 0x00080000 /* with workaround */
167167

168+
/*
169+
* OPAL_CONFIG_CPU_IDLE_STATE parameters
170+
*/
171+
#define OPAL_CONFIG_IDLE_FASTSLEEP 1
172+
#define OPAL_CONFIG_IDLE_UNDO 0
173+
#define OPAL_CONFIG_IDLE_APPLY 1
174+
168175
#ifndef __ASSEMBLY__
169176

170177
/* Other enums */

arch/powerpc/include/asm/opal.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -186,6 +186,7 @@ int64_t opal_handle_hmi(void);
186186
int64_t opal_register_dump_region(uint32_t id, uint64_t start, uint64_t end);
187187
int64_t opal_unregister_dump_region(uint32_t id);
188188
int64_t opal_slw_set_reg(uint64_t cpu_pir, uint64_t sprn, uint64_t val);
189+
int64_t opal_config_cpu_idle_state(uint64_t state, uint64_t flag);
189190
int64_t opal_pci_set_phb_cxl_mode(uint64_t phb_id, uint64_t mode, uint64_t pe_number);
190191
int64_t opal_ipmi_send(uint64_t interface, struct opal_ipmi_msg *msg,
191192
uint64_t msg_len);

arch/powerpc/platforms/powernv/idle.c

Lines changed: 101 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -13,6 +13,8 @@
1313
#include <linux/mm.h>
1414
#include <linux/slab.h>
1515
#include <linux/of.h>
16+
#include <linux/device.h>
17+
#include <linux/cpu.h>
1618

1719
#include <asm/firmware.h>
1820
#include <asm/opal.h>
@@ -137,6 +139,96 @@ u32 pnv_get_supported_cpuidle_states(void)
137139
}
138140
EXPORT_SYMBOL_GPL(pnv_get_supported_cpuidle_states);
139141

142+
143+
static void pnv_fastsleep_workaround_apply(void *info)
144+
145+
{
146+
int rc;
147+
int *err = info;
148+
149+
rc = opal_config_cpu_idle_state(OPAL_CONFIG_IDLE_FASTSLEEP,
150+
OPAL_CONFIG_IDLE_APPLY);
151+
if (rc)
152+
*err = 1;
153+
}
154+
155+
/*
156+
* Used to store fastsleep workaround state
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* 0 - Workaround applied/undone at fastsleep entry/exit path (Default)
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* 1 - Workaround applied once, never undone.
159+
*/
160+
static u8 fastsleep_workaround_applyonce;
161+
162+
static ssize_t show_fastsleep_workaround_applyonce(struct device *dev,
163+
struct device_attribute *attr, char *buf)
164+
{
165+
return sprintf(buf, "%u\n", fastsleep_workaround_applyonce);
166+
}
167+
168+
static ssize_t store_fastsleep_workaround_applyonce(struct device *dev,
169+
struct device_attribute *attr, const char *buf,
170+
size_t count)
171+
{
172+
cpumask_t primary_thread_mask;
173+
int err;
174+
u8 val;
175+
176+
if (kstrtou8(buf, 0, &val) || val != 1)
177+
return -EINVAL;
178+
179+
if (fastsleep_workaround_applyonce == 1)
180+
return count;
181+
182+
/*
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* fastsleep_workaround_applyonce = 1 implies
184+
* fastsleep workaround needs to be left in 'applied' state on all
185+
* the cores. Do this by-
186+
* 1. Patching out the call to 'undo' workaround in fastsleep exit path
187+
* 2. Sending ipi to all the cores which have atleast one online thread
188+
* 3. Patching out the call to 'apply' workaround in fastsleep entry
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* path
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* There is no need to send ipi to cores which have all threads
191+
* offlined, as last thread of the core entering fastsleep or deeper
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* state would have applied workaround.
193+
*/
194+
err = patch_instruction(
195+
(unsigned int *)pnv_fastsleep_workaround_at_exit,
196+
PPC_INST_NOP);
197+
if (err) {
198+
pr_err("fastsleep_workaround_applyonce change failed while patching pnv_fastsleep_workaround_at_exit");
199+
goto fail;
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}
201+
202+
get_online_cpus();
203+
primary_thread_mask = cpu_online_cores_map();
204+
on_each_cpu_mask(&primary_thread_mask,
205+
pnv_fastsleep_workaround_apply,
206+
&err, 1);
207+
put_online_cpus();
208+
if (err) {
209+
pr_err("fastsleep_workaround_applyonce change failed while running pnv_fastsleep_workaround_apply");
210+
goto fail;
211+
}
212+
213+
err = patch_instruction(
214+
(unsigned int *)pnv_fastsleep_workaround_at_entry,
215+
PPC_INST_NOP);
216+
if (err) {
217+
pr_err("fastsleep_workaround_applyonce change failed while patching pnv_fastsleep_workaround_at_entry");
218+
goto fail;
219+
}
220+
221+
fastsleep_workaround_applyonce = 1;
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223+
return count;
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fail:
225+
return -EIO;
226+
}
227+
228+
static DEVICE_ATTR(fastsleep_workaround_applyonce, 0600,
229+
show_fastsleep_workaround_applyonce,
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store_fastsleep_workaround_applyonce);
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140232
static int __init pnv_init_idle_states(void)
141233
{
142234
struct device_node *power_mgt;
@@ -181,7 +273,16 @@ static int __init pnv_init_idle_states(void)
181273
patch_instruction(
182274
(unsigned int *)pnv_fastsleep_workaround_at_exit,
183275
PPC_INST_NOP);
276+
} else {
277+
/*
278+
* OPAL_PM_SLEEP_ENABLED_ER1 is set. It indicates that
279+
* workaround is needed to use fastsleep. Provide sysfs
280+
* control to choose how this workaround has to be applied.
281+
*/
282+
device_create_file(cpu_subsys.dev_root,
283+
&dev_attr_fastsleep_workaround_applyonce);
184284
}
285+
185286
pnv_alloc_idle_core_states();
186287
out_free:
187288
kfree(flags);

arch/powerpc/platforms/powernv/opal-wrappers.S

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -283,6 +283,7 @@ OPAL_CALL(opal_sensor_read, OPAL_SENSOR_READ);
283283
OPAL_CALL(opal_get_param, OPAL_GET_PARAM);
284284
OPAL_CALL(opal_set_param, OPAL_SET_PARAM);
285285
OPAL_CALL(opal_handle_hmi, OPAL_HANDLE_HMI);
286+
OPAL_CALL(opal_config_cpu_idle_state, OPAL_CONFIG_CPU_IDLE_STATE);
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OPAL_CALL(opal_slw_set_reg, OPAL_SLW_SET_REG);
287288
OPAL_CALL(opal_register_dump_region, OPAL_REGISTER_DUMP_REGION);
288289
OPAL_CALL(opal_unregister_dump_region, OPAL_UNREGISTER_DUMP_REGION);

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