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Alex Elderdavem330
Alex Elder
authored and
davem330
committed
net: ipa: define IPA remaining GSI register offsets
Add the remaining GSI register offset definitions. Use gsi_reg() rather than the corresponding GSI_*_OFFSET() macros to get the offsets for these registers, and get rid of the macros. Note that we are now defining information for the HW_PARAM_2 register, and that doesn't appear until IPA v3.5.1. Signed-off-by: Alex Elder <[email protected]> Signed-off-by: David S. Miller <[email protected]>
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+76
-27
lines changed

5 files changed

+76
-27
lines changed

‎drivers/net/ipa/gsi.c

Lines changed: 27 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -437,16 +437,18 @@ static void gsi_evt_ring_command(struct gsi *gsi, u32 evt_ring_id,
437437
enum gsi_evt_cmd_opcode opcode)
438438
{
439439
struct device *dev = gsi->dev;
440+
const struct reg *reg;
440441
bool timeout;
441442
u32 val;
442443

443444
/* Enable the completion interrupt for the command */
444445
gsi_irq_ev_ctrl_enable(gsi, evt_ring_id);
445446

447+
reg = gsi_reg(gsi, EV_CH_CMD);
446448
val = u32_encode_bits(evt_ring_id, EV_CHID_FMASK);
447449
val |= u32_encode_bits(opcode, EV_OPCODE_FMASK);
448450

449-
timeout = !gsi_command(gsi, GSI_EV_CH_CMD_OFFSET, val);
451+
timeout = !gsi_command(gsi, reg_offset(reg), val);
450452

451453
gsi_irq_ev_ctrl_disable(gsi);
452454

@@ -552,15 +554,18 @@ gsi_channel_command(struct gsi_channel *channel, enum gsi_ch_cmd_opcode opcode)
552554
u32 channel_id = gsi_channel_id(channel);
553555
struct gsi *gsi = channel->gsi;
554556
struct device *dev = gsi->dev;
557+
const struct reg *reg;
555558
bool timeout;
556559
u32 val;
557560

558561
/* Enable the completion interrupt for the command */
559562
gsi_irq_ch_ctrl_enable(gsi, channel_id);
560563

564+
reg = gsi_reg(gsi, CH_CMD);
561565
val = u32_encode_bits(channel_id, CH_CHID_FMASK);
562566
val |= u32_encode_bits(opcode, CH_OPCODE_FMASK);
563-
timeout = !gsi_command(gsi, GSI_CH_CMD_OFFSET, val);
567+
568+
timeout = !gsi_command(gsi, reg_offset(reg), val);
564569

565570
gsi_irq_ch_ctrl_disable(gsi);
566571

@@ -1230,15 +1235,22 @@ static void gsi_isr_glob_err(struct gsi *gsi)
12301235
{
12311236
enum gsi_err_type type;
12321237
enum gsi_err_code code;
1238+
const struct reg *reg;
1239+
u32 offset;
12331240
u32 which;
12341241
u32 val;
12351242
u32 ee;
12361243

12371244
/* Get the logged error, then reinitialize the log */
1238-
val = ioread32(gsi->virt + GSI_ERROR_LOG_OFFSET);
1239-
iowrite32(0, gsi->virt + GSI_ERROR_LOG_OFFSET);
1240-
iowrite32(~0, gsi->virt + GSI_ERROR_LOG_CLR_OFFSET);
1245+
reg = gsi_reg(gsi, ERROR_LOG);
1246+
offset = reg_offset(reg);
1247+
val = ioread32(gsi->virt + offset);
1248+
iowrite32(0, gsi->virt + offset);
12411249

1250+
reg = gsi_reg(gsi, ERROR_LOG_CLR);
1251+
iowrite32(~0, gsi->virt + reg_offset(reg));
1252+
1253+
/* Parse the error value */
12421254
ee = u32_get_bits(val, ERR_EE_FMASK);
12431255
type = u32_get_bits(val, ERR_TYPE_FMASK);
12441256
which = u32_get_bits(val, ERR_VIRT_IDX_FMASK);
@@ -1806,13 +1818,14 @@ static int gsi_generic_command(struct gsi *gsi, u32 channel_id,
18061818
iowrite32(val, gsi->virt + offset);
18071819

18081820
/* Now issue the command */
1821+
reg = gsi_reg(gsi, GENERIC_CMD);
18091822
val = u32_encode_bits(opcode, GENERIC_OPCODE_FMASK);
18101823
val |= u32_encode_bits(channel_id, GENERIC_CHID_FMASK);
18111824
val |= u32_encode_bits(GSI_EE_MODEM, GENERIC_EE_FMASK);
18121825
if (gsi->version >= IPA_VERSION_4_11)
18131826
val |= u32_encode_bits(params, GENERIC_PARAMS_FMASK);
18141827

1815-
timeout = !gsi_command(gsi, GSI_GENERIC_CMD_OFFSET, val);
1828+
timeout = !gsi_command(gsi, reg_offset(reg), val);
18161829

18171830
/* Disable the GP_INT1 IRQ type again */
18181831
reg = gsi_reg(gsi, CNTXT_GLOB_IRQ_EN);
@@ -2025,6 +2038,7 @@ static void gsi_irq_teardown(struct gsi *gsi)
20252038
static int gsi_ring_setup(struct gsi *gsi)
20262039
{
20272040
struct device *dev = gsi->dev;
2041+
const struct reg *reg;
20282042
u32 count;
20292043
u32 val;
20302044

@@ -2036,7 +2050,8 @@ static int gsi_ring_setup(struct gsi *gsi)
20362050
return 0;
20372051
}
20382052

2039-
val = ioread32(gsi->virt + GSI_GSI_HW_PARAM_2_OFFSET);
2053+
reg = gsi_reg(gsi, HW_PARAM_2);
2054+
val = ioread32(gsi->virt + reg_offset(reg));
20402055

20412056
count = u32_get_bits(val, NUM_CH_PER_EE_FMASK);
20422057
if (!count) {
@@ -2069,11 +2084,13 @@ static int gsi_ring_setup(struct gsi *gsi)
20692084
/* Setup function for GSI. GSI firmware must be loaded and initialized */
20702085
int gsi_setup(struct gsi *gsi)
20712086
{
2087+
const struct reg *reg;
20722088
u32 val;
20732089
int ret;
20742090

20752091
/* Here is where we first touch the GSI hardware */
2076-
val = ioread32(gsi->virt + GSI_GSI_STATUS_OFFSET);
2092+
reg = gsi_reg(gsi, GSI_STATUS);
2093+
val = ioread32(gsi->virt + reg_offset(reg));
20772094
if (!(val & ENABLED_FMASK)) {
20782095
dev_err(gsi->dev, "GSI has not been enabled\n");
20792096
return -EIO;
@@ -2088,7 +2105,8 @@ int gsi_setup(struct gsi *gsi)
20882105
goto err_irq_teardown;
20892106

20902107
/* Initialize the error log */
2091-
iowrite32(0, gsi->virt + GSI_ERROR_LOG_OFFSET);
2108+
reg = gsi_reg(gsi, ERROR_LOG);
2109+
iowrite32(0, gsi->virt + reg_offset(reg));
20922110

20932111
ret = gsi_channel_setup(gsi);
20942112
if (ret)

‎drivers/net/ipa/gsi_reg.c

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -98,13 +98,15 @@ static const struct regs *gsi_regs(struct gsi *gsi)
9898
{
9999
switch (gsi->version) {
100100
case IPA_VERSION_3_1:
101+
return &gsi_regs_v3_1;
102+
101103
case IPA_VERSION_3_5_1:
102104
case IPA_VERSION_4_2:
103105
case IPA_VERSION_4_5:
104106
case IPA_VERSION_4_7:
105107
case IPA_VERSION_4_9:
106108
case IPA_VERSION_4_11:
107-
return &gsi_regs_v3_1;
109+
return &gsi_regs_v3_5_1;
108110

109111
default:
110112
return NULL;

‎drivers/net/ipa/gsi_reg.h

Lines changed: 7 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -154,12 +154,10 @@ enum gsi_prefetch_mode {
154154
#define MODC_FMASK GENMASK(23, 16)
155155
#define MOD_CNT_FMASK GENMASK(31, 24)
156156

157-
#define GSI_GSI_STATUS_OFFSET \
158-
(0x0001f000 + 0x4000 * GSI_EE_AP)
157+
/* GSI_STATUS register */
159158
#define ENABLED_FMASK GENMASK(0, 0)
160159

161-
#define GSI_CH_CMD_OFFSET \
162-
(0x0001f008 + 0x4000 * GSI_EE_AP)
160+
/* CH_CMD register */
163161
#define CH_CHID_FMASK GENMASK(7, 0)
164162
#define CH_OPCODE_FMASK GENMASK(31, 24)
165163

@@ -173,8 +171,7 @@ enum gsi_ch_cmd_opcode {
173171
GSI_CH_DB_STOP = 0xb,
174172
};
175173

176-
#define GSI_EV_CH_CMD_OFFSET \
177-
(0x0001f010 + 0x4000 * GSI_EE_AP)
174+
/* EV_CH_CMD register */
178175
#define EV_CHID_FMASK GENMASK(7, 0)
179176
#define EV_OPCODE_FMASK GENMASK(31, 24)
180177

@@ -185,8 +182,7 @@ enum gsi_evt_cmd_opcode {
185182
GSI_EVT_DE_ALLOC = 0xa,
186183
};
187184

188-
#define GSI_GENERIC_CMD_OFFSET \
189-
(0x0001f018 + 0x4000 * GSI_EE_AP)
185+
/* GENERIC_CMD register */
190186
#define GENERIC_OPCODE_FMASK GENMASK(4, 0)
191187
#define GENERIC_CHID_FMASK GENMASK(9, 5)
192188
#define GENERIC_EE_FMASK GENMASK(13, 10)
@@ -201,9 +197,7 @@ enum gsi_generic_cmd_opcode {
201197
GSI_GENERIC_QUERY_FLOW_CONTROL = 0x5, /* IPA v4.11+ */
202198
};
203199

204-
/* The next register is present for IPA v3.5.1 and above */
205-
#define GSI_GSI_HW_PARAM_2_OFFSET \
206-
(0x0001f040 + 0x4000 * GSI_EE_AP)
200+
/* HW_PARAM_2 register */ /* IPA v3.5.1+ */
207201
#define IRAM_SIZE_FMASK GENMASK(2, 0)
208202
#define NUM_CH_PER_EE_FMASK GENMASK(7, 3)
209203
#define NUM_EV_PER_EE_FMASK GENMASK(12, 8)
@@ -272,9 +266,7 @@ enum gsi_general_irq_id {
272266
/* CNTXT_INTSET register */
273267
#define INTYPE_FMASK GENMASK(0, 0)
274268

275-
#define GSI_ERROR_LOG_OFFSET \
276-
(0x0001f200 + 0x4000 * GSI_EE_AP)
277-
269+
/* ERROR_LOG register */
278270
#define ERR_ARG3_FMASK GENMASK(3, 0)
279271
#define ERR_ARG2_FMASK GENMASK(7, 4)
280272
#define ERR_ARG1_FMASK GENMASK(11, 8)
@@ -302,9 +294,7 @@ enum gsi_err_type {
302294
GSI_ERR_TYPE_EVT = 0x3,
303295
};
304296

305-
#define GSI_ERROR_LOG_CLR_OFFSET \
306-
(0x0001f210 + 0x4000 * GSI_EE_AP)
307-
297+
/* CNTXT_SCRATCH_0 register */
308298
#define INTER_EE_RESULT_FMASK GENMASK(2, 0)
309299
#define GENERIC_EE_RESULT_FMASK GENMASK(7, 5)
310300

‎drivers/net/ipa/reg/gsi_reg-v3.1.c

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -28,6 +28,10 @@ REG_STRIDE(CH_C_CNTXT_3, ch_c_cntxt_3, 0x0001c00c + 0x4000 * GSI_EE_AP, 0x80);
2828

2929
REG_STRIDE(CH_C_QOS, ch_c_qos, 0x0001c05c + 0x4000 * GSI_EE_AP, 0x80);
3030

31+
REG(ERROR_LOG, error_log, 0x0001f200 + 0x4000 * GSI_EE_AP);
32+
33+
REG(ERROR_LOG_CLR, error_log_clr, 0x0001f210 + 0x4000 * GSI_EE_AP);
34+
3135
REG_STRIDE(CH_C_SCRATCH_0, ch_c_scratch_0,
3236
0x0001c060 + 0x4000 * GSI_EE_AP, 0x80);
3337

@@ -85,6 +89,14 @@ REG_STRIDE(CH_C_DOORBELL_0, ch_c_doorbell_0,
8589
REG_STRIDE(EV_CH_E_DOORBELL_0, ev_ch_e_doorbell_0,
8690
0x0001e100 + 0x4000 * GSI_EE_AP, 0x08);
8791

92+
REG(GSI_STATUS, gsi_status, 0x0001f000 + 0x4000 * GSI_EE_AP);
93+
94+
REG(CH_CMD, ch_cmd, 0x0001f008 + 0x4000 * GSI_EE_AP);
95+
96+
REG(EV_CH_CMD, ev_ch_cmd, 0x0001f010 + 0x4000 * GSI_EE_AP);
97+
98+
REG(GENERIC_CMD, generic_cmd, 0x0001f018 + 0x4000 * GSI_EE_AP);
99+
88100
REG(CNTXT_TYPE_IRQ, cntxt_type_irq, 0x0001f080 + 0x4000 * GSI_EE_AP);
89101

90102
REG(CNTXT_TYPE_IRQ_MSK, cntxt_type_irq_msk, 0x0001f088 + 0x4000 * GSI_EE_AP);
@@ -156,6 +168,10 @@ static const struct reg *reg_array[] = {
156168
[EV_CH_E_SCRATCH_1] = &reg_ev_ch_e_scratch_1,
157169
[CH_C_DOORBELL_0] = &reg_ch_c_doorbell_0,
158170
[EV_CH_E_DOORBELL_0] = &reg_ev_ch_e_doorbell_0,
171+
[GSI_STATUS] = &reg_gsi_status,
172+
[CH_CMD] = &reg_ch_cmd,
173+
[EV_CH_CMD] = &reg_ev_ch_cmd,
174+
[GENERIC_CMD] = &reg_generic_cmd,
159175
[CNTXT_TYPE_IRQ] = &reg_cntxt_type_irq,
160176
[CNTXT_TYPE_IRQ_MSK] = &reg_cntxt_type_irq_msk,
161177
[CNTXT_SRC_CH_IRQ] = &reg_cntxt_src_ch_irq,
@@ -174,6 +190,8 @@ static const struct reg *reg_array[] = {
174190
[CNTXT_GSI_IRQ_EN] = &reg_cntxt_gsi_irq_en,
175191
[CNTXT_GSI_IRQ_CLR] = &reg_cntxt_gsi_irq_clr,
176192
[CNTXT_INTSET] = &reg_cntxt_intset,
193+
[ERROR_LOG] = &reg_error_log,
194+
[ERROR_LOG_CLR] = &reg_error_log_clr,
177195
[CNTXT_SCRATCH_0] = &reg_cntxt_scratch_0,
178196
};
179197

‎drivers/net/ipa/reg/gsi_reg-v3.5.1.c

Lines changed: 21 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -28,6 +28,10 @@ REG_STRIDE(CH_C_CNTXT_3, ch_c_cntxt_3, 0x0001c00c + 0x4000 * GSI_EE_AP, 0x80);
2828

2929
REG_STRIDE(CH_C_QOS, ch_c_qos, 0x0001c05c + 0x4000 * GSI_EE_AP, 0x80);
3030

31+
REG(ERROR_LOG, error_log, 0x0001f200 + 0x4000 * GSI_EE_AP);
32+
33+
REG(ERROR_LOG_CLR, error_log_clr, 0x0001f210 + 0x4000 * GSI_EE_AP);
34+
3135
REG_STRIDE(CH_C_SCRATCH_0, ch_c_scratch_0,
3236
0x0001c060 + 0x4000 * GSI_EE_AP, 0x80);
3337

@@ -85,6 +89,16 @@ REG_STRIDE(CH_C_DOORBELL_0, ch_c_doorbell_0,
8589
REG_STRIDE(EV_CH_E_DOORBELL_0, ev_ch_e_doorbell_0,
8690
0x0001e100 + 0x4000 * GSI_EE_AP, 0x08);
8791

92+
REG(GSI_STATUS, gsi_status, 0x0001f000 + 0x4000 * GSI_EE_AP);
93+
94+
REG(CH_CMD, ch_cmd, 0x0001f008 + 0x4000 * GSI_EE_AP);
95+
96+
REG(EV_CH_CMD, ev_ch_cmd, 0x0001f010 + 0x4000 * GSI_EE_AP);
97+
98+
REG(GENERIC_CMD, generic_cmd, 0x0001f018 + 0x4000 * GSI_EE_AP);
99+
100+
REG(HW_PARAM_2, hw_param_2, 0x0001f040 + 0x4000 * GSI_EE_AP);
101+
88102
REG(CNTXT_TYPE_IRQ, cntxt_type_irq, 0x0001f080 + 0x4000 * GSI_EE_AP);
89103

90104
REG(CNTXT_TYPE_IRQ_MSK, cntxt_type_irq_msk, 0x0001f088 + 0x4000 * GSI_EE_AP);
@@ -156,6 +170,11 @@ static const struct reg *reg_array[] = {
156170
[EV_CH_E_SCRATCH_1] = &reg_ev_ch_e_scratch_1,
157171
[CH_C_DOORBELL_0] = &reg_ch_c_doorbell_0,
158172
[EV_CH_E_DOORBELL_0] = &reg_ev_ch_e_doorbell_0,
173+
[GSI_STATUS] = &reg_gsi_status,
174+
[CH_CMD] = &reg_ch_cmd,
175+
[EV_CH_CMD] = &reg_ev_ch_cmd,
176+
[GENERIC_CMD] = &reg_generic_cmd,
177+
[HW_PARAM_2] = &reg_hw_param_2,
159178
[CNTXT_TYPE_IRQ] = &reg_cntxt_type_irq,
160179
[CNTXT_TYPE_IRQ_MSK] = &reg_cntxt_type_irq_msk,
161180
[CNTXT_SRC_CH_IRQ] = &reg_cntxt_src_ch_irq,
@@ -174,6 +193,8 @@ static const struct reg *reg_array[] = {
174193
[CNTXT_GSI_IRQ_EN] = &reg_cntxt_gsi_irq_en,
175194
[CNTXT_GSI_IRQ_CLR] = &reg_cntxt_gsi_irq_clr,
176195
[CNTXT_INTSET] = &reg_cntxt_intset,
196+
[ERROR_LOG] = &reg_error_log,
197+
[ERROR_LOG_CLR] = &reg_error_log_clr,
177198
[CNTXT_SCRATCH_0] = &reg_cntxt_scratch_0,
178199
};
179200

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