@@ -83,7 +83,9 @@ struct tegra_adma;
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* @nr_channels: Number of DMA channels available.
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* @ch_fifo_size_mask: Mask for FIFO size field.
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* @sreq_index_offset: Slave channel index offset.
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+ * @max_page: Maximum ADMA Channel Page.
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* @has_outstanding_reqs: If DMA channel can have outstanding requests.
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+ * @set_global_pg_config: Global page programming.
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*/
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struct tegra_adma_chip_data {
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unsigned int (* adma_get_burst_config )(unsigned int burst_size );
@@ -99,6 +101,7 @@ struct tegra_adma_chip_data {
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unsigned int nr_channels ;
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unsigned int ch_fifo_size_mask ;
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unsigned int sreq_index_offset ;
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+ unsigned int max_page ;
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bool has_outstanding_reqs ;
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void (* set_global_pg_config )(struct tegra_adma * tdma );
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};
@@ -854,6 +857,7 @@ static const struct tegra_adma_chip_data tegra210_chip_data = {
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.nr_channels = 22 ,
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.ch_fifo_size_mask = 0xf ,
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.sreq_index_offset = 2 ,
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+ .max_page = 0 ,
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.has_outstanding_reqs = false,
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.set_global_pg_config = NULL ,
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};
@@ -871,6 +875,7 @@ static const struct tegra_adma_chip_data tegra186_chip_data = {
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.nr_channels = 32 ,
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.ch_fifo_size_mask = 0x1f ,
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.sreq_index_offset = 4 ,
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+ .max_page = 4 ,
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.has_outstanding_reqs = true,
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.set_global_pg_config = tegra186_adma_global_page_config ,
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};
@@ -921,7 +926,7 @@ static int tegra_adma_probe(struct platform_device *pdev)
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page_offset = res_page -> start - res_base -> start ;
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page_no = div_u64 (page_offset , cdata -> ch_base_offset );
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- if (WARN_ON (page_no == 0 ))
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+ if (WARN_ON (page_no == 0 || page_no > cdata -> max_page ))
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return - EINVAL ;
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tdma -> ch_page_no = lower_32_bits (page_no ) - 1 ;
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