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drm/i915: Simplify checking of GPU reset_counter in display pageflips
If we, when we store the reset_counter for the operation, we ensure that it is not in a wedged or in the middle of a reset, we can then assert that if any reset occurs the reset_counter must change. Later we can just compare the operation's reset epoch against the current counter to see if we need to abort the operation (to handle the hang). Signed-off-by: Chris Wilson <[email protected]> Cc: Daniel Vetter <[email protected]> Reviewed-by: Daniel Vetter <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected]
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drivers/gpu/drm/i915/intel_display.c

Lines changed: 9 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -3198,14 +3198,12 @@ void intel_finish_reset(struct drm_device *dev)
31983198
static bool intel_crtc_has_pending_flip(struct drm_crtc *crtc)
31993199
{
32003200
struct drm_device *dev = crtc->dev;
3201-
struct drm_i915_private *dev_priv = dev->dev_private;
32023201
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
32033202
unsigned reset_counter;
32043203
bool pending;
32053204

3206-
reset_counter = i915_reset_counter(&dev_priv->gpu_error);
3207-
if (intel_crtc->reset_counter != reset_counter ||
3208-
__i915_reset_in_progress_or_wedged(reset_counter))
3205+
reset_counter = i915_reset_counter(&to_i915(dev)->gpu_error);
3206+
if (intel_crtc->reset_counter != reset_counter)
32093207
return false;
32103208

32113209
spin_lock_irq(&dev->event_lock);
@@ -10913,8 +10911,7 @@ static bool page_flip_finished(struct intel_crtc *crtc)
1091310911
unsigned reset_counter;
1091410912

1091510913
reset_counter = i915_reset_counter(&dev_priv->gpu_error);
10916-
if (crtc->reset_counter != reset_counter ||
10917-
__i915_reset_in_progress_or_wedged(reset_counter))
10914+
if (crtc->reset_counter != reset_counter)
1091810915
return true;
1091910916

1092010917
/*
@@ -11576,8 +11573,13 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
1157611573
if (ret)
1157711574
goto cleanup;
1157811575

11579-
atomic_inc(&intel_crtc->unpin_work_count);
1158011576
intel_crtc->reset_counter = i915_reset_counter(&dev_priv->gpu_error);
11577+
if (__i915_reset_in_progress_or_wedged(intel_crtc->reset_counter)) {
11578+
ret = -EIO;
11579+
goto cleanup;
11580+
}
11581+
11582+
atomic_inc(&intel_crtc->unpin_work_count);
1158111583

1158211584
if (INTEL_INFO(dev)->gen >= 5 || IS_G4X(dev))
1158311585
work->flip_count = I915_READ(PIPE_FLIPCOUNT_G4X(pipe)) + 1;

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