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#include <asm/system.h>
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#include <asm/unaligned.h>
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#include <asm/dma.h>
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- #include <asm/cacheflush.h>
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#include "fsl_usb2_udc.h"
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@@ -118,6 +117,17 @@ static void (*_fsl_writel)(u32 v, unsigned __iomem *p);
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#define fsl_readl (p ) (*_fsl_readl)((p))
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#define fsl_writel (v , p ) (*_fsl_writel)((v), (p))
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+ static inline void fsl_set_accessors (struct fsl_usb2_platform_data * pdata )
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+ {
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+ if (pdata -> big_endian_mmio ) {
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+ _fsl_readl = _fsl_readl_be ;
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+ _fsl_writel = _fsl_writel_be ;
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+ } else {
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+ _fsl_readl = _fsl_readl_le ;
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+ _fsl_writel = _fsl_writel_le ;
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+ }
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+ }
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+
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static inline u32 cpu_to_hc32 (const u32 x )
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{
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return udc_controller -> pdata -> big_endian_desc
@@ -132,6 +142,8 @@ static inline u32 hc32_to_cpu(const u32 x)
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: le32_to_cpu ((__force __le32 )x );
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}
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#else /* !CONFIG_PPC32 */
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+ static inline void fsl_set_accessors (struct fsl_usb2_platform_data * pdata ) {}
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+
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#define fsl_readl (addr ) readl(addr)
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#define fsl_writel (val32 , addr ) writel(val32, addr)
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#define cpu_to_hc32 (x ) cpu_to_le32(x)
@@ -1277,6 +1289,11 @@ static int ep0_prime_status(struct fsl_udc *udc, int direction)
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req -> req .complete = NULL ;
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req -> dtd_count = 0 ;
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+ req -> req .dma = dma_map_single (ep -> udc -> gadget .dev .parent ,
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+ req -> req .buf , req -> req .length ,
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+ ep_is_in (ep ) ? DMA_TO_DEVICE : DMA_FROM_DEVICE );
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+ req -> mapped = 1 ;
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+
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if (fsl_req_to_dtd (req ) == 0 )
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fsl_queue_td (ep , req );
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else
@@ -1348,16 +1365,18 @@ static void ch9getstatus(struct fsl_udc *udc, u8 request_type, u16 value,
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/* Fill in the reqest structure */
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* ((u16 * ) req -> req .buf ) = cpu_to_le16 (tmp );
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- /* flush cache for the req buffer */
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- flush_dcache_range ((u32 )req -> req .buf , (u32 )req -> req .buf + 8 );
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-
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req -> ep = ep ;
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req -> req .length = 2 ;
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req -> req .status = - EINPROGRESS ;
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req -> req .actual = 0 ;
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req -> req .complete = NULL ;
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req -> dtd_count = 0 ;
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+ req -> req .dma = dma_map_single (ep -> udc -> gadget .dev .parent ,
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+ req -> req .buf , req -> req .length ,
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+ ep_is_in (ep ) ? DMA_TO_DEVICE : DMA_FROM_DEVICE );
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+ req -> mapped = 1 ;
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+
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/* prime the data phase */
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if ((fsl_req_to_dtd (req ) == 0 ))
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fsl_queue_td (ep , req );
@@ -2354,7 +2373,6 @@ static int __init struct_udc_setup(struct fsl_udc *udc,
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struct fsl_req , req );
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/* allocate a small amount of memory to get valid address */
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udc -> status_req -> req .buf = kmalloc (8 , GFP_KERNEL );
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- udc -> status_req -> req .dma = virt_to_phys (udc -> status_req -> req .buf );
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udc -> resume_state = USB_STATE_NOTATTACHED ;
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udc -> usb_state = USB_STATE_POWERED ;
@@ -2470,13 +2488,7 @@ static int __init fsl_udc_probe(struct platform_device *pdev)
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}
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/* Set accessors only after pdata->init() ! */
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- if (pdata -> big_endian_mmio ) {
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- _fsl_readl = _fsl_readl_be ;
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- _fsl_writel = _fsl_writel_be ;
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- } else {
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- _fsl_readl = _fsl_readl_le ;
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- _fsl_writel = _fsl_writel_le ;
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- }
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+ fsl_set_accessors (pdata );
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#ifndef CONFIG_ARCH_MXC
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if (pdata -> have_sysif_regs )
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