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Merge tag 'juno-fixes-4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/dt64
Pull "ARMv8 Juno DT fixes for v4.12" from Sudeep Holla: 1. Couple of fixes to remove device tree warnings introduced with recently added checks in DTC 2. Add information about L1 and L2 caches to Juno device trees as CCSIDR-based cacheinfo probing is now removed * tag 'juno-fixes-4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: arm64: dts: juno: add information about L1 and L2 caches arm64: dts: juno: fix few unit address format warnings arm64: dts: juno: fix PCI bus dtc warnings
2 parents d0815df + f9936c4 commit ae706be

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5 files changed

+134
-8
lines changed

5 files changed

+134
-8
lines changed

‎arch/arm64/boot/dts/arm/juno-base.dtsi

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -428,7 +428,7 @@
428428
};
429429
};
430430

431-
pcie_ctlr: pcie-controller@40000000 {
431+
pcie_ctlr: pcie@40000000 {
432432
compatible = "arm,juno-r1-pcie", "plda,xpressrich3-axi", "pci-host-ecam-generic";
433433
device_type = "pci";
434434
reg = <0 0x40000000 0 0x10000000>; /* ECAM config space */
@@ -699,7 +699,7 @@
699699
<0x00000008 0x80000000 0x1 0x80000000>;
700700
};
701701

702-
smb@08000000 {
702+
smb@8000000 {
703703
compatible = "simple-bus";
704704
#address-cells = <2>;
705705
#size-cells = <1>;

‎arch/arm64/boot/dts/arm/juno-motherboard.dtsi

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -137,7 +137,7 @@
137137
#size-cells = <1>;
138138
ranges = <0 3 0 0x200000>;
139139

140-
v2m_sysctl: sysctl@020000 {
140+
v2m_sysctl: sysctl@20000 {
141141
compatible = "arm,sp810", "arm,primecell";
142142
reg = <0x020000 0x1000>;
143143
clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&mb_clk24mhz>;
@@ -148,7 +148,7 @@
148148
assigned-clock-parents = <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>;
149149
};
150150

151-
apbregs@010000 {
151+
apbregs@10000 {
152152
compatible = "syscon", "simple-mfd";
153153
reg = <0x010000 0x1000>;
154154

@@ -216,7 +216,7 @@
216216
};
217217
};
218218

219-
mmci@050000 {
219+
mmci@50000 {
220220
compatible = "arm,pl180", "arm,primecell";
221221
reg = <0x050000 0x1000>;
222222
interrupts = <5>;
@@ -228,23 +228,23 @@
228228
clock-names = "mclk", "apb_pclk";
229229
};
230230

231-
kmi@060000 {
231+
kmi@60000 {
232232
compatible = "arm,pl050", "arm,primecell";
233233
reg = <0x060000 0x1000>;
234234
interrupts = <8>;
235235
clocks = <&mb_clk24mhz>, <&soc_smc50mhz>;
236236
clock-names = "KMIREFCLK", "apb_pclk";
237237
};
238238

239-
kmi@070000 {
239+
kmi@70000 {
240240
compatible = "arm,pl050", "arm,primecell";
241241
reg = <0x070000 0x1000>;
242242
interrupts = <8>;
243243
clocks = <&mb_clk24mhz>, <&soc_smc50mhz>;
244244
clock-names = "KMIREFCLK", "apb_pclk";
245245
};
246246

247-
wdt@0f0000 {
247+
wdt@f0000 {
248248
compatible = "arm,sp805", "arm,primecell";
249249
reg = <0x0f0000 0x10000>;
250250
interrupts = <7>;

‎arch/arm64/boot/dts/arm/juno-r1.dts

Lines changed: 42 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -89,6 +89,12 @@
8989
reg = <0x0 0x0>;
9090
device_type = "cpu";
9191
enable-method = "psci";
92+
i-cache-size = <0xc000>;
93+
i-cache-line-size = <64>;
94+
i-cache-sets = <256>;
95+
d-cache-size = <0x8000>;
96+
d-cache-line-size = <64>;
97+
d-cache-sets = <256>;
9298
next-level-cache = <&A57_L2>;
9399
clocks = <&scpi_dvfs 0>;
94100
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -100,6 +106,12 @@
100106
reg = <0x0 0x1>;
101107
device_type = "cpu";
102108
enable-method = "psci";
109+
i-cache-size = <0xc000>;
110+
i-cache-line-size = <64>;
111+
i-cache-sets = <256>;
112+
d-cache-size = <0x8000>;
113+
d-cache-line-size = <64>;
114+
d-cache-sets = <256>;
103115
next-level-cache = <&A57_L2>;
104116
clocks = <&scpi_dvfs 0>;
105117
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -111,6 +123,12 @@
111123
reg = <0x0 0x100>;
112124
device_type = "cpu";
113125
enable-method = "psci";
126+
i-cache-size = <0x8000>;
127+
i-cache-line-size = <64>;
128+
i-cache-sets = <256>;
129+
d-cache-size = <0x8000>;
130+
d-cache-line-size = <64>;
131+
d-cache-sets = <128>;
114132
next-level-cache = <&A53_L2>;
115133
clocks = <&scpi_dvfs 1>;
116134
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -122,6 +140,12 @@
122140
reg = <0x0 0x101>;
123141
device_type = "cpu";
124142
enable-method = "psci";
143+
i-cache-size = <0x8000>;
144+
i-cache-line-size = <64>;
145+
i-cache-sets = <256>;
146+
d-cache-size = <0x8000>;
147+
d-cache-line-size = <64>;
148+
d-cache-sets = <128>;
125149
next-level-cache = <&A53_L2>;
126150
clocks = <&scpi_dvfs 1>;
127151
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -133,6 +157,12 @@
133157
reg = <0x0 0x102>;
134158
device_type = "cpu";
135159
enable-method = "psci";
160+
i-cache-size = <0x8000>;
161+
i-cache-line-size = <64>;
162+
i-cache-sets = <256>;
163+
d-cache-size = <0x8000>;
164+
d-cache-line-size = <64>;
165+
d-cache-sets = <128>;
136166
next-level-cache = <&A53_L2>;
137167
clocks = <&scpi_dvfs 1>;
138168
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -144,6 +174,12 @@
144174
reg = <0x0 0x103>;
145175
device_type = "cpu";
146176
enable-method = "psci";
177+
i-cache-size = <0x8000>;
178+
i-cache-line-size = <64>;
179+
i-cache-sets = <256>;
180+
d-cache-size = <0x8000>;
181+
d-cache-line-size = <64>;
182+
d-cache-sets = <128>;
147183
next-level-cache = <&A53_L2>;
148184
clocks = <&scpi_dvfs 1>;
149185
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -152,10 +188,16 @@
152188

153189
A57_L2: l2-cache0 {
154190
compatible = "cache";
191+
cache-size = <0x200000>;
192+
cache-line-size = <64>;
193+
cache-sets = <2048>;
155194
};
156195

157196
A53_L2: l2-cache1 {
158197
compatible = "cache";
198+
cache-size = <0x100000>;
199+
cache-line-size = <64>;
200+
cache-sets = <1024>;
159201
};
160202
};
161203

‎arch/arm64/boot/dts/arm/juno-r2.dts

Lines changed: 42 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -89,6 +89,12 @@
8989
reg = <0x0 0x0>;
9090
device_type = "cpu";
9191
enable-method = "psci";
92+
i-cache-size = <0xc000>;
93+
i-cache-line-size = <64>;
94+
i-cache-sets = <256>;
95+
d-cache-size = <0x8000>;
96+
d-cache-line-size = <64>;
97+
d-cache-sets = <256>;
9298
next-level-cache = <&A72_L2>;
9399
clocks = <&scpi_dvfs 0>;
94100
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -100,6 +106,12 @@
100106
reg = <0x0 0x1>;
101107
device_type = "cpu";
102108
enable-method = "psci";
109+
i-cache-size = <0xc000>;
110+
i-cache-line-size = <64>;
111+
i-cache-sets = <256>;
112+
d-cache-size = <0x8000>;
113+
d-cache-line-size = <64>;
114+
d-cache-sets = <256>;
103115
next-level-cache = <&A72_L2>;
104116
clocks = <&scpi_dvfs 0>;
105117
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -111,6 +123,12 @@
111123
reg = <0x0 0x100>;
112124
device_type = "cpu";
113125
enable-method = "psci";
126+
i-cache-size = <0x8000>;
127+
i-cache-line-size = <64>;
128+
i-cache-sets = <256>;
129+
d-cache-size = <0x8000>;
130+
d-cache-line-size = <64>;
131+
d-cache-sets = <128>;
114132
next-level-cache = <&A53_L2>;
115133
clocks = <&scpi_dvfs 1>;
116134
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -122,6 +140,12 @@
122140
reg = <0x0 0x101>;
123141
device_type = "cpu";
124142
enable-method = "psci";
143+
i-cache-size = <0x8000>;
144+
i-cache-line-size = <64>;
145+
i-cache-sets = <256>;
146+
d-cache-size = <0x8000>;
147+
d-cache-line-size = <64>;
148+
d-cache-sets = <128>;
125149
next-level-cache = <&A53_L2>;
126150
clocks = <&scpi_dvfs 1>;
127151
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -133,6 +157,12 @@
133157
reg = <0x0 0x102>;
134158
device_type = "cpu";
135159
enable-method = "psci";
160+
i-cache-size = <0x8000>;
161+
i-cache-line-size = <64>;
162+
i-cache-sets = <256>;
163+
d-cache-size = <0x8000>;
164+
d-cache-line-size = <64>;
165+
d-cache-sets = <128>;
136166
next-level-cache = <&A53_L2>;
137167
clocks = <&scpi_dvfs 1>;
138168
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -144,6 +174,12 @@
144174
reg = <0x0 0x103>;
145175
device_type = "cpu";
146176
enable-method = "psci";
177+
i-cache-size = <0x8000>;
178+
i-cache-line-size = <64>;
179+
i-cache-sets = <256>;
180+
d-cache-size = <0x8000>;
181+
d-cache-line-size = <64>;
182+
d-cache-sets = <128>;
147183
next-level-cache = <&A53_L2>;
148184
clocks = <&scpi_dvfs 1>;
149185
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -152,10 +188,16 @@
152188

153189
A72_L2: l2-cache0 {
154190
compatible = "cache";
191+
cache-size = <0x200000>;
192+
cache-line-size = <64>;
193+
cache-sets = <2048>;
155194
};
156195

157196
A53_L2: l2-cache1 {
158197
compatible = "cache";
198+
cache-size = <0x100000>;
199+
cache-line-size = <64>;
200+
cache-sets = <1024>;
159201
};
160202
};
161203

‎arch/arm64/boot/dts/arm/juno.dts

Lines changed: 42 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -88,6 +88,12 @@
8888
reg = <0x0 0x0>;
8989
device_type = "cpu";
9090
enable-method = "psci";
91+
i-cache-size = <0xc000>;
92+
i-cache-line-size = <64>;
93+
i-cache-sets = <256>;
94+
d-cache-size = <0x8000>;
95+
d-cache-line-size = <64>;
96+
d-cache-sets = <256>;
9197
next-level-cache = <&A57_L2>;
9298
clocks = <&scpi_dvfs 0>;
9399
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -99,6 +105,12 @@
99105
reg = <0x0 0x1>;
100106
device_type = "cpu";
101107
enable-method = "psci";
108+
i-cache-size = <0xc000>;
109+
i-cache-line-size = <64>;
110+
i-cache-sets = <256>;
111+
d-cache-size = <0x8000>;
112+
d-cache-line-size = <64>;
113+
d-cache-sets = <256>;
102114
next-level-cache = <&A57_L2>;
103115
clocks = <&scpi_dvfs 0>;
104116
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -110,6 +122,12 @@
110122
reg = <0x0 0x100>;
111123
device_type = "cpu";
112124
enable-method = "psci";
125+
i-cache-size = <0x8000>;
126+
i-cache-line-size = <64>;
127+
i-cache-sets = <256>;
128+
d-cache-size = <0x8000>;
129+
d-cache-line-size = <64>;
130+
d-cache-sets = <128>;
113131
next-level-cache = <&A53_L2>;
114132
clocks = <&scpi_dvfs 1>;
115133
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -121,6 +139,12 @@
121139
reg = <0x0 0x101>;
122140
device_type = "cpu";
123141
enable-method = "psci";
142+
i-cache-size = <0x8000>;
143+
i-cache-line-size = <64>;
144+
i-cache-sets = <256>;
145+
d-cache-size = <0x8000>;
146+
d-cache-line-size = <64>;
147+
d-cache-sets = <128>;
124148
next-level-cache = <&A53_L2>;
125149
clocks = <&scpi_dvfs 1>;
126150
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -132,6 +156,12 @@
132156
reg = <0x0 0x102>;
133157
device_type = "cpu";
134158
enable-method = "psci";
159+
i-cache-size = <0x8000>;
160+
i-cache-line-size = <64>;
161+
i-cache-sets = <256>;
162+
d-cache-size = <0x8000>;
163+
d-cache-line-size = <64>;
164+
d-cache-sets = <128>;
135165
next-level-cache = <&A53_L2>;
136166
clocks = <&scpi_dvfs 1>;
137167
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -143,6 +173,12 @@
143173
reg = <0x0 0x103>;
144174
device_type = "cpu";
145175
enable-method = "psci";
176+
i-cache-size = <0x8000>;
177+
i-cache-line-size = <64>;
178+
i-cache-sets = <256>;
179+
d-cache-size = <0x8000>;
180+
d-cache-line-size = <64>;
181+
d-cache-sets = <128>;
146182
next-level-cache = <&A53_L2>;
147183
clocks = <&scpi_dvfs 1>;
148184
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -151,10 +187,16 @@
151187

152188
A57_L2: l2-cache0 {
153189
compatible = "cache";
190+
cache-size = <0x200000>;
191+
cache-line-size = <64>;
192+
cache-sets = <2048>;
154193
};
155194

156195
A53_L2: l2-cache1 {
157196
compatible = "cache";
197+
cache-size = <0x100000>;
198+
cache-line-size = <64>;
199+
cache-sets = <1024>;
158200
};
159201
};
160202

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