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viviendavem330
vivien
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net: dsa: mv88e6xxx: move the Global 2 macros
Move the GLOBAL2_* macros where they belong, in the related global2.h header. Signed-off-by: Vivien Didelot <[email protected]> Signed-off-by: David S. Miller <[email protected]>
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3 files changed

+103
-103
lines changed

3 files changed

+103
-103
lines changed

‎drivers/net/dsa/mv88e6xxx/chip.h

Lines changed: 0 additions & 101 deletions
Original file line numberDiff line numberDiff line change
@@ -33,107 +33,6 @@
3333
#define SMI_CMD_OP_45_READ_DATA_INC ((3 << 10) | SMI_CMD_BUSY)
3434
#define SMI_DATA 0x01
3535

36-
#define GLOBAL2_INT_SOURCE 0x00
37-
#define GLOBAL2_INT_SOURCE_WATCHDOG 15
38-
#define GLOBAL2_INT_MASK 0x01
39-
#define GLOBAL2_MGMT_EN_2X 0x02
40-
#define GLOBAL2_MGMT_EN_0X 0x03
41-
#define GLOBAL2_FLOW_CONTROL 0x04
42-
#define GLOBAL2_SWITCH_MGMT 0x05
43-
#define GLOBAL2_SWITCH_MGMT_USE_DOUBLE_TAG_DATA BIT(15)
44-
#define GLOBAL2_SWITCH_MGMT_PREVENT_LOOPS BIT(14)
45-
#define GLOBAL2_SWITCH_MGMT_FLOW_CONTROL_MSG BIT(13)
46-
#define GLOBAL2_SWITCH_MGMT_FORCE_FLOW_CTRL_PRI BIT(7)
47-
#define GLOBAL2_SWITCH_MGMT_RSVD2CPU BIT(3)
48-
#define GLOBAL2_DEVICE_MAPPING 0x06
49-
#define GLOBAL2_DEVICE_MAPPING_UPDATE BIT(15)
50-
#define GLOBAL2_DEVICE_MAPPING_TARGET_SHIFT 8
51-
#define GLOBAL2_DEVICE_MAPPING_PORT_MASK 0x0f
52-
#define GLOBAL2_TRUNK_MASK 0x07
53-
#define GLOBAL2_TRUNK_MASK_UPDATE BIT(15)
54-
#define GLOBAL2_TRUNK_MASK_NUM_SHIFT 12
55-
#define GLOBAL2_TRUNK_MASK_HASK BIT(11)
56-
#define GLOBAL2_TRUNK_MAPPING 0x08
57-
#define GLOBAL2_TRUNK_MAPPING_UPDATE BIT(15)
58-
#define GLOBAL2_TRUNK_MAPPING_ID_SHIFT 11
59-
#define GLOBAL2_IRL_CMD 0x09
60-
#define GLOBAL2_IRL_CMD_BUSY BIT(15)
61-
#define GLOBAL2_IRL_CMD_OP_INIT_ALL ((0x001 << 12) | GLOBAL2_IRL_CMD_BUSY)
62-
#define GLOBAL2_IRL_CMD_OP_INIT_SEL ((0x010 << 12) | GLOBAL2_IRL_CMD_BUSY)
63-
#define GLOBAL2_IRL_CMD_OP_WRITE_SEL ((0x011 << 12) | GLOBAL2_IRL_CMD_BUSY)
64-
#define GLOBAL2_IRL_CMD_OP_READ_SEL ((0x100 << 12) | GLOBAL2_IRL_CMD_BUSY)
65-
#define GLOBAL2_IRL_DATA 0x0a
66-
#define GLOBAL2_PVT_ADDR 0x0b
67-
#define GLOBAL2_PVT_ADDR_BUSY BIT(15)
68-
#define GLOBAL2_PVT_ADDR_OP_INIT_ONES ((0x01 << 12) | GLOBAL2_PVT_ADDR_BUSY)
69-
#define GLOBAL2_PVT_ADDR_OP_WRITE_PVLAN ((0x03 << 12) | GLOBAL2_PVT_ADDR_BUSY)
70-
#define GLOBAL2_PVT_ADDR_OP_READ ((0x04 << 12) | GLOBAL2_PVT_ADDR_BUSY)
71-
#define GLOBAL2_PVT_DATA 0x0c
72-
#define GLOBAL2_SWITCH_MAC 0x0d
73-
#define GLOBAL2_ATU_STATS 0x0e
74-
#define GLOBAL2_PRIO_OVERRIDE 0x0f
75-
#define GLOBAL2_PRIO_OVERRIDE_FORCE_SNOOP BIT(7)
76-
#define GLOBAL2_PRIO_OVERRIDE_SNOOP_SHIFT 4
77-
#define GLOBAL2_PRIO_OVERRIDE_FORCE_ARP BIT(3)
78-
#define GLOBAL2_PRIO_OVERRIDE_ARP_SHIFT 0
79-
#define GLOBAL2_EEPROM_CMD 0x14
80-
#define GLOBAL2_EEPROM_CMD_BUSY BIT(15)
81-
#define GLOBAL2_EEPROM_CMD_OP_WRITE ((0x3 << 12) | GLOBAL2_EEPROM_CMD_BUSY)
82-
#define GLOBAL2_EEPROM_CMD_OP_READ ((0x4 << 12) | GLOBAL2_EEPROM_CMD_BUSY)
83-
#define GLOBAL2_EEPROM_CMD_OP_LOAD ((0x6 << 12) | GLOBAL2_EEPROM_CMD_BUSY)
84-
#define GLOBAL2_EEPROM_CMD_RUNNING BIT(11)
85-
#define GLOBAL2_EEPROM_CMD_WRITE_EN BIT(10)
86-
#define GLOBAL2_EEPROM_CMD_ADDR_MASK 0xff
87-
#define GLOBAL2_EEPROM_DATA 0x15
88-
#define GLOBAL2_EEPROM_ADDR 0x15 /* 6390, 6341 */
89-
#define GLOBAL2_PTP_AVB_OP 0x16
90-
#define GLOBAL2_PTP_AVB_DATA 0x17
91-
#define GLOBAL2_SMI_PHY_CMD 0x18
92-
#define GLOBAL2_SMI_PHY_CMD_BUSY BIT(15)
93-
#define GLOBAL2_SMI_PHY_CMD_EXTERNAL BIT(13)
94-
#define GLOBAL2_SMI_PHY_CMD_MODE_22 BIT(12)
95-
#define GLOBAL2_SMI_PHY_CMD_OP_22_WRITE_DATA ((0x1 << 10) | \
96-
GLOBAL2_SMI_PHY_CMD_MODE_22 | \
97-
GLOBAL2_SMI_PHY_CMD_BUSY)
98-
#define GLOBAL2_SMI_PHY_CMD_OP_22_READ_DATA ((0x2 << 10) | \
99-
GLOBAL2_SMI_PHY_CMD_MODE_22 | \
100-
GLOBAL2_SMI_PHY_CMD_BUSY)
101-
#define GLOBAL2_SMI_PHY_CMD_OP_45_WRITE_ADDR ((0x0 << 10) | \
102-
GLOBAL2_SMI_PHY_CMD_BUSY)
103-
#define GLOBAL2_SMI_PHY_CMD_OP_45_WRITE_DATA ((0x1 << 10) | \
104-
GLOBAL2_SMI_PHY_CMD_BUSY)
105-
#define GLOBAL2_SMI_PHY_CMD_OP_45_READ_DATA ((0x3 << 10) | \
106-
GLOBAL2_SMI_PHY_CMD_BUSY)
107-
108-
#define GLOBAL2_SMI_PHY_DATA 0x19
109-
#define GLOBAL2_SCRATCH_MISC 0x1a
110-
#define GLOBAL2_SCRATCH_BUSY BIT(15)
111-
#define GLOBAL2_SCRATCH_REGISTER_SHIFT 8
112-
#define GLOBAL2_SCRATCH_VALUE_MASK 0xff
113-
#define GLOBAL2_WDOG_CONTROL 0x1b
114-
#define GLOBAL2_WDOG_CONTROL_EGRESS_EVENT BIT(7)
115-
#define GLOBAL2_WDOG_CONTROL_RMU_TIMEOUT BIT(6)
116-
#define GLOBAL2_WDOG_CONTROL_QC_ENABLE BIT(5)
117-
#define GLOBAL2_WDOG_CONTROL_EGRESS_HISTORY BIT(4)
118-
#define GLOBAL2_WDOG_CONTROL_EGRESS_ENABLE BIT(3)
119-
#define GLOBAL2_WDOG_CONTROL_FORCE_IRQ BIT(2)
120-
#define GLOBAL2_WDOG_CONTROL_HISTORY BIT(1)
121-
#define GLOBAL2_WDOG_CONTROL_SWRESET BIT(0)
122-
#define GLOBAL2_WDOG_UPDATE BIT(15)
123-
#define GLOBAL2_WDOG_INT_SOURCE (0x00 << 8)
124-
#define GLOBAL2_WDOG_INT_STATUS (0x10 << 8)
125-
#define GLOBAL2_WDOG_INT_ENABLE (0x11 << 8)
126-
#define GLOBAL2_WDOG_EVENT (0x12 << 8)
127-
#define GLOBAL2_WDOG_HISTORY (0x13 << 8)
128-
#define GLOBAL2_WDOG_DATA_MASK 0xff
129-
#define GLOBAL2_WDOG_CUT_THROUGH BIT(3)
130-
#define GLOBAL2_WDOG_QUEUE_CONTROLLER BIT(2)
131-
#define GLOBAL2_WDOG_EGRESS BIT(1)
132-
#define GLOBAL2_WDOG_FORCE_IRQ BIT(0)
133-
#define GLOBAL2_QOS_WEIGHT 0x1c
134-
#define GLOBAL2_MISC 0x1d
135-
#define GLOBAL2_MISC_5_BIT_PORT BIT(14)
136-
13736
#define MV88E6XXX_N_FID 4096
13837

13938
/* PVT limits for 4-bit port and 5-bit switch */

‎drivers/net/dsa/mv88e6xxx/global2.c

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -20,8 +20,6 @@
2020
#include "global1.h" /* for GLOBAL_STATUS_IRQ_DEVICE */
2121
#include "global2.h"
2222

23-
#define ADDR_GLOBAL2 0x1c
24-
2523
static int mv88e6xxx_g2_read(struct mv88e6xxx_chip *chip, int reg, u16 *val)
2624
{
2725
return mv88e6xxx_read(chip, ADDR_GLOBAL2, reg, val);

‎drivers/net/dsa/mv88e6xxx/global2.h

Lines changed: 103 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -17,6 +17,109 @@
1717

1818
#include "chip.h"
1919

20+
#define ADDR_GLOBAL2 0x1c
21+
22+
#define GLOBAL2_INT_SOURCE 0x00
23+
#define GLOBAL2_INT_SOURCE_WATCHDOG 15
24+
#define GLOBAL2_INT_MASK 0x01
25+
#define GLOBAL2_MGMT_EN_2X 0x02
26+
#define GLOBAL2_MGMT_EN_0X 0x03
27+
#define GLOBAL2_FLOW_CONTROL 0x04
28+
#define GLOBAL2_SWITCH_MGMT 0x05
29+
#define GLOBAL2_SWITCH_MGMT_USE_DOUBLE_TAG_DATA BIT(15)
30+
#define GLOBAL2_SWITCH_MGMT_PREVENT_LOOPS BIT(14)
31+
#define GLOBAL2_SWITCH_MGMT_FLOW_CONTROL_MSG BIT(13)
32+
#define GLOBAL2_SWITCH_MGMT_FORCE_FLOW_CTRL_PRI BIT(7)
33+
#define GLOBAL2_SWITCH_MGMT_RSVD2CPU BIT(3)
34+
#define GLOBAL2_DEVICE_MAPPING 0x06
35+
#define GLOBAL2_DEVICE_MAPPING_UPDATE BIT(15)
36+
#define GLOBAL2_DEVICE_MAPPING_TARGET_SHIFT 8
37+
#define GLOBAL2_DEVICE_MAPPING_PORT_MASK 0x0f
38+
#define GLOBAL2_TRUNK_MASK 0x07
39+
#define GLOBAL2_TRUNK_MASK_UPDATE BIT(15)
40+
#define GLOBAL2_TRUNK_MASK_NUM_SHIFT 12
41+
#define GLOBAL2_TRUNK_MASK_HASK BIT(11)
42+
#define GLOBAL2_TRUNK_MAPPING 0x08
43+
#define GLOBAL2_TRUNK_MAPPING_UPDATE BIT(15)
44+
#define GLOBAL2_TRUNK_MAPPING_ID_SHIFT 11
45+
#define GLOBAL2_IRL_CMD 0x09
46+
#define GLOBAL2_IRL_CMD_BUSY BIT(15)
47+
#define GLOBAL2_IRL_CMD_OP_INIT_ALL ((0x001 << 12) | GLOBAL2_IRL_CMD_BUSY)
48+
#define GLOBAL2_IRL_CMD_OP_INIT_SEL ((0x010 << 12) | GLOBAL2_IRL_CMD_BUSY)
49+
#define GLOBAL2_IRL_CMD_OP_WRITE_SEL ((0x011 << 12) | GLOBAL2_IRL_CMD_BUSY)
50+
#define GLOBAL2_IRL_CMD_OP_READ_SEL ((0x100 << 12) | GLOBAL2_IRL_CMD_BUSY)
51+
#define GLOBAL2_IRL_DATA 0x0a
52+
#define GLOBAL2_PVT_ADDR 0x0b
53+
#define GLOBAL2_PVT_ADDR_BUSY BIT(15)
54+
#define GLOBAL2_PVT_ADDR_OP_INIT_ONES ((0x01 << 12) | GLOBAL2_PVT_ADDR_BUSY)
55+
#define GLOBAL2_PVT_ADDR_OP_WRITE_PVLAN ((0x03 << 12) | GLOBAL2_PVT_ADDR_BUSY)
56+
#define GLOBAL2_PVT_ADDR_OP_READ ((0x04 << 12) | GLOBAL2_PVT_ADDR_BUSY)
57+
#define GLOBAL2_PVT_DATA 0x0c
58+
#define GLOBAL2_SWITCH_MAC 0x0d
59+
#define GLOBAL2_ATU_STATS 0x0e
60+
#define GLOBAL2_PRIO_OVERRIDE 0x0f
61+
#define GLOBAL2_PRIO_OVERRIDE_FORCE_SNOOP BIT(7)
62+
#define GLOBAL2_PRIO_OVERRIDE_SNOOP_SHIFT 4
63+
#define GLOBAL2_PRIO_OVERRIDE_FORCE_ARP BIT(3)
64+
#define GLOBAL2_PRIO_OVERRIDE_ARP_SHIFT 0
65+
#define GLOBAL2_EEPROM_CMD 0x14
66+
#define GLOBAL2_EEPROM_CMD_BUSY BIT(15)
67+
#define GLOBAL2_EEPROM_CMD_OP_WRITE ((0x3 << 12) | GLOBAL2_EEPROM_CMD_BUSY)
68+
#define GLOBAL2_EEPROM_CMD_OP_READ ((0x4 << 12) | GLOBAL2_EEPROM_CMD_BUSY)
69+
#define GLOBAL2_EEPROM_CMD_OP_LOAD ((0x6 << 12) | GLOBAL2_EEPROM_CMD_BUSY)
70+
#define GLOBAL2_EEPROM_CMD_RUNNING BIT(11)
71+
#define GLOBAL2_EEPROM_CMD_WRITE_EN BIT(10)
72+
#define GLOBAL2_EEPROM_CMD_ADDR_MASK 0xff
73+
#define GLOBAL2_EEPROM_DATA 0x15
74+
#define GLOBAL2_EEPROM_ADDR 0x15 /* 6390, 6341 */
75+
#define GLOBAL2_PTP_AVB_OP 0x16
76+
#define GLOBAL2_PTP_AVB_DATA 0x17
77+
#define GLOBAL2_SMI_PHY_CMD 0x18
78+
#define GLOBAL2_SMI_PHY_CMD_BUSY BIT(15)
79+
#define GLOBAL2_SMI_PHY_CMD_EXTERNAL BIT(13)
80+
#define GLOBAL2_SMI_PHY_CMD_MODE_22 BIT(12)
81+
#define GLOBAL2_SMI_PHY_CMD_OP_22_WRITE_DATA ((0x1 << 10) | \
82+
GLOBAL2_SMI_PHY_CMD_MODE_22 | \
83+
GLOBAL2_SMI_PHY_CMD_BUSY)
84+
#define GLOBAL2_SMI_PHY_CMD_OP_22_READ_DATA ((0x2 << 10) | \
85+
GLOBAL2_SMI_PHY_CMD_MODE_22 | \
86+
GLOBAL2_SMI_PHY_CMD_BUSY)
87+
#define GLOBAL2_SMI_PHY_CMD_OP_45_WRITE_ADDR ((0x0 << 10) | \
88+
GLOBAL2_SMI_PHY_CMD_BUSY)
89+
#define GLOBAL2_SMI_PHY_CMD_OP_45_WRITE_DATA ((0x1 << 10) | \
90+
GLOBAL2_SMI_PHY_CMD_BUSY)
91+
#define GLOBAL2_SMI_PHY_CMD_OP_45_READ_DATA ((0x3 << 10) | \
92+
GLOBAL2_SMI_PHY_CMD_BUSY)
93+
94+
#define GLOBAL2_SMI_PHY_DATA 0x19
95+
#define GLOBAL2_SCRATCH_MISC 0x1a
96+
#define GLOBAL2_SCRATCH_BUSY BIT(15)
97+
#define GLOBAL2_SCRATCH_REGISTER_SHIFT 8
98+
#define GLOBAL2_SCRATCH_VALUE_MASK 0xff
99+
#define GLOBAL2_WDOG_CONTROL 0x1b
100+
#define GLOBAL2_WDOG_CONTROL_EGRESS_EVENT BIT(7)
101+
#define GLOBAL2_WDOG_CONTROL_RMU_TIMEOUT BIT(6)
102+
#define GLOBAL2_WDOG_CONTROL_QC_ENABLE BIT(5)
103+
#define GLOBAL2_WDOG_CONTROL_EGRESS_HISTORY BIT(4)
104+
#define GLOBAL2_WDOG_CONTROL_EGRESS_ENABLE BIT(3)
105+
#define GLOBAL2_WDOG_CONTROL_FORCE_IRQ BIT(2)
106+
#define GLOBAL2_WDOG_CONTROL_HISTORY BIT(1)
107+
#define GLOBAL2_WDOG_CONTROL_SWRESET BIT(0)
108+
#define GLOBAL2_WDOG_UPDATE BIT(15)
109+
#define GLOBAL2_WDOG_INT_SOURCE (0x00 << 8)
110+
#define GLOBAL2_WDOG_INT_STATUS (0x10 << 8)
111+
#define GLOBAL2_WDOG_INT_ENABLE (0x11 << 8)
112+
#define GLOBAL2_WDOG_EVENT (0x12 << 8)
113+
#define GLOBAL2_WDOG_HISTORY (0x13 << 8)
114+
#define GLOBAL2_WDOG_DATA_MASK 0xff
115+
#define GLOBAL2_WDOG_CUT_THROUGH BIT(3)
116+
#define GLOBAL2_WDOG_QUEUE_CONTROLLER BIT(2)
117+
#define GLOBAL2_WDOG_EGRESS BIT(1)
118+
#define GLOBAL2_WDOG_FORCE_IRQ BIT(0)
119+
#define GLOBAL2_QOS_WEIGHT 0x1c
120+
#define GLOBAL2_MISC 0x1d
121+
#define GLOBAL2_MISC_5_BIT_PORT BIT(14)
122+
20123
#ifdef CONFIG_NET_DSA_MV88E6XXX_GLOBAL2
21124

22125
static inline int mv88e6xxx_g2_require(struct mv88e6xxx_chip *chip)

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