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5 | 5 |
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6 | 6 | #include <linux/err.h>
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7 | 7 | #include <linux/init.h>
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| 8 | +#include <linux/interrupt.h> |
8 | 9 | #include <linux/irq.h>
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9 | 10 | #include <linux/irqchip.h>
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10 | 11 | #include <linux/irqdomain.h>
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@@ -50,6 +51,26 @@ static u32 pdc_reg_read(int reg, u32 i)
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50 | 51 | return readl_relaxed(pdc_base + reg + i * sizeof(u32));
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51 | 52 | }
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52 | 53 |
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| 54 | +static int qcom_pdc_gic_get_irqchip_state(struct irq_data *d, |
| 55 | + enum irqchip_irq_state which, |
| 56 | + bool *state) |
| 57 | +{ |
| 58 | + if (d->hwirq == GPIO_NO_WAKE_IRQ) |
| 59 | + return 0; |
| 60 | + |
| 61 | + return irq_chip_get_parent_state(d, which, state); |
| 62 | +} |
| 63 | + |
| 64 | +static int qcom_pdc_gic_set_irqchip_state(struct irq_data *d, |
| 65 | + enum irqchip_irq_state which, |
| 66 | + bool value) |
| 67 | +{ |
| 68 | + if (d->hwirq == GPIO_NO_WAKE_IRQ) |
| 69 | + return 0; |
| 70 | + |
| 71 | + return irq_chip_set_parent_state(d, which, value); |
| 72 | +} |
| 73 | + |
53 | 74 | static void pdc_enable_intr(struct irq_data *d, bool on)
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54 | 75 | {
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55 | 76 | int pin_out = d->hwirq;
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@@ -178,6 +199,8 @@ static struct irq_chip qcom_pdc_gic_chip = {
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178 | 199 | .irq_unmask = qcom_pdc_gic_unmask,
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179 | 200 | .irq_disable = qcom_pdc_gic_disable,
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180 | 201 | .irq_enable = qcom_pdc_gic_enable,
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| 202 | + .irq_get_irqchip_state = qcom_pdc_gic_get_irqchip_state, |
| 203 | + .irq_set_irqchip_state = qcom_pdc_gic_set_irqchip_state, |
181 | 204 | .irq_retrigger = irq_chip_retrigger_hierarchy,
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182 | 205 | .irq_set_type = qcom_pdc_gic_set_type,
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183 | 206 | .flags = IRQCHIP_MASK_ON_SUSPEND |
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