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Merge tag 'pinctrl-v4.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij: "This is the bulk of pin control changes for v4.18. No core changes this time! Just a calm all-over-the-place drivers, updates and fixes cycle as it seems. New drivers/subdrivers: - Actions Semiconductor S900 driver with more Actions variants for S700, S500 in the pipe. Also generic GPIO support on top of the same driver and IRQ support is in the pipe. - Renesas r8a77470 PFC support. - Renesas r8a77990 PFC support. - Allwinner Sunxi H6 R_PIO support. - Rockchip PX30 support. - Meson Meson8m2 support. - Remove support for the ill-fated Samsung Exynos 5440 SoC. Improvements: - Context save/restore support in pinctrl-single. - External interrupt support for the Mediatek MT7622. - Qualcomm ACPI HID QCOM8002 supported. Fixes: - Fix up suspend/resume support for Exynos 5433. - Fix Strago DMI fixes on the Intel Cherryview" * tag 'pinctrl-v4.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (72 commits) pinctrl: cherryview: limit Strago DMI workarounds to version 1.0 pinctrl: at91-pio4: add missing of_node_put pinctrl: armada-37xx: Fix spurious irq management gpiolib: discourage gpiochip_add_pin[group]_range for DT pinctrls pinctrl: msm: fix gpio-hog related boot issues MAINTAINERS: update entry for Mediatek pin controller pinctrl: mediatek: remove unused fields in struct mtk_eint_hw pinctrl: mediatek: use generic EINT register maps for each SoC pinctrl: mediatek: add EINT support to MT7622 SoC pinctrl: mediatek: refactor EINT related code for all MediaTek pinctrl can fit dt-bindings: pinctrl: add external interrupt support to MT7622 pinctrl pinctrl: freescale: Switch to SPDX identifier pinctrl: samsung: Fix suspend/resume for Exynos5433 GPF1..5 banks pinctrl: sh-pfc: rcar-gen3: Fix grammar in static pin comments pinctrl: sh-pfc: r8a77965: Add I2C pin support pinctrl: sh-pfc: r8a77990: Add EthernetAVB pins, groups and functions pinctrl: sh-pfc: r8a77990: Add I2C{1,2,4,5,6,7} pins, groups and functions pinctrl: sh-pfc: r8a77990: Add SCIF pins, groups and functions pinctrl: sh-pfc: r8a77990: Add bias pinconf support pinctrl: sh-pfc: Initial R8A77990 PFC support ...
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‎Documentation/devicetree/bindings/pinctrl/actions,s900-pinctrl.txt

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@@ -8,6 +8,17 @@ Required Properties:
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- reg: Should contain the register base address and size of
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the pin controller.
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- clocks: phandle of the clock feeding the pin controller
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- gpio-controller: Marks the device node as a GPIO controller.
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- gpio-ranges: Specifies the mapping between gpio controller and
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pin-controller pins.
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- #gpio-cells: Should be two. The first cell is the gpio pin number
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and the second cell is used for optional parameters.
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- interrupt-controller: Marks the device node as an interrupt controller.
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- #interrupt-cells: Specifies the number of cells needed to encode an
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interrupt. Shall be set to 2. The first cell
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defines the interrupt number, the second encodes
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the trigger flags described in
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bindings/interrupt-controller/interrupts.txt
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Please refer to pinctrl-bindings.txt in this directory for details of the
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common pinctrl bindings used by client devices, including the meaning of the
@@ -164,6 +175,11 @@ Example:
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compatible = "actions,s900-pinctrl";
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reg = <0x0 0xe01b0000 0x0 0x1000>;
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clocks = <&cmu CLK_GPIO>;
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gpio-controller;
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gpio-ranges = <&pinctrl 0 0 146>;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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uart2-default: uart2-default {
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pinmux {

‎Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt

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@@ -28,6 +28,7 @@ Required properties:
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"allwinner,sun50i-a64-r-pinctrl"
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"allwinner,sun50i-h5-pinctrl"
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"allwinner,sun50i-h6-pinctrl"
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"allwinner,sun50i-h6-r-pinctrl"
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"nextthing,gr8-pinctrl"
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- reg: Should contain the register physical address and length for the

‎Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt

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@@ -36,6 +36,24 @@ listed. In other words, a subnode that lists only a mux function implies no
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information about any pull configuration. Similarly, a subnode that lists only
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a pul parameter implies no information about the mux function.
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The BCM2835 pin configuration and multiplexing supports the generic bindings.
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For details on each properties, you can refer to ./pinctrl-bindings.txt.
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Required sub-node properties:
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- pins
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- function
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Optional sub-node properties:
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- bias-disable
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- bias-pull-up
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- bias-pull-down
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- output-high
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- output-low
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Legacy pin configuration and multiplexing binding:
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*** (Its use is deprecated, use generic multiplexing and configuration
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bindings instead)
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Required subnode-properties:
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- brcm,pins: An array of cells. Each cell contains the ID of a pin. Valid IDs
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are the integer GPIO IDs; 0==GPIO0, 1==GPIO1, ... 53==GPIO53.

‎Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt

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@@ -3,8 +3,10 @@
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Required properties for the root node:
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- compatible: one of "amlogic,meson8-cbus-pinctrl"
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"amlogic,meson8b-cbus-pinctrl"
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"amlogic,meson8m2-cbus-pinctrl"
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"amlogic,meson8-aobus-pinctrl"
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"amlogic,meson8b-aobus-pinctrl"
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"amlogic,meson8m2-aobus-pinctrl"
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"amlogic,meson-gxbb-periphs-pinctrl"
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"amlogic,meson-gxbb-aobus-pinctrl"
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"amlogic,meson-gxl-periphs-pinctrl"

‎Documentation/devicetree/bindings/pinctrl/pinctrl-mcp23s08.txt

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@@ -18,7 +18,9 @@ Required properties:
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removed.
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- #gpio-cells : Should be two.
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- first cell is the pin number
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- second cell is used to specify flags. Flags are currently unused.
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- second cell is used to specify flags as described in
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'Documentation/devicetree/bindings/gpio/gpio.txt'. Allowed values defined by
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'include/dt-bindings/gpio/gpio.h' (e.g. GPIO_ACTIVE_LOW).
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- gpio-controller : Marks the device node as a GPIO controller.
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- reg : For an address on its bus. I2C uses this a the I2C address of the chip.
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SPI uses this to specify the chipselect line which the chip is

‎Documentation/devicetree/bindings/pinctrl/pinctrl-mt7622.txt

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@@ -9,6 +9,16 @@ Required properties for the root node:
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- #gpio-cells: Should be two. The first cell is the pin number and the
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second is the GPIO flags.
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Optional properties:
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- interrupt-controller : Marks the device node as an interrupt controller
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If the property interrupt-controller is defined, following property is required
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- reg-names: A string describing the "reg" entries. Must contain "eint".
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- interrupts : The interrupt output from the controller.
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- #interrupt-cells: Should be two.
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- interrupt-parent: Phandle of the interrupt parent to which the external
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GPIO interrupts are forwarded to.
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Please refer to pinctrl-bindings.txt in this directory for details of the
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common pinctrl bindings used by client devices, including the meaning of the
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phrase "pin configuration node".

‎Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt

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- "renesas,pfc-r8a7740": for R8A7740 (R-Mobile A1) compatible pin-controller.
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- "renesas,pfc-r8a7743": for R8A7743 (RZ/G1M) compatible pin-controller.
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- "renesas,pfc-r8a7745": for R8A7745 (RZ/G1E) compatible pin-controller.
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- "renesas,pfc-r8a77470": for R8A77470 (RZ/G1C) compatible pin-controller.
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- "renesas,pfc-r8a7778": for R8A7778 (R-Car M1) compatible pin-controller.
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- "renesas,pfc-r8a7779": for R8A7779 (R-Car H1) compatible pin-controller.
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- "renesas,pfc-r8a7790": for R8A7790 (R-Car H2) compatible pin-controller.
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- "renesas,pfc-r8a77965": for R8A77965 (R-Car M3-N) compatible pin-controller.
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- "renesas,pfc-r8a77970": for R8A77970 (R-Car V3M) compatible pin-controller.
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- "renesas,pfc-r8a77980": for R8A77980 (R-Car V3H) compatible pin-controller.
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- "renesas,pfc-r8a77990": for R8A77990 (R-Car E3) compatible pin-controller.
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- "renesas,pfc-r8a77995": for R8A77995 (R-Car D3) compatible pin-controller.
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- "renesas,pfc-sh73a0": for SH73A0 (SH-Mobile AG5) compatible pin-controller.
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‎Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt

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@@ -20,6 +20,7 @@ defined as gpio sub-nodes of the pinmux controller.
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Required properties for iomux controller:
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- compatible: should be
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"rockchip,px30-pinctrl": for Rockchip PX30
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"rockchip,rv1108-pinctrl": for Rockchip RV1108
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"rockchip,rk2928-pinctrl": for Rockchip RK2928
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"rockchip,rk3066a-pinctrl": for Rockchip RK3066a

‎MAINTAINERS

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@@ -1135,10 +1135,12 @@ F: arch/arm/mach-actions/
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F: arch/arm/boot/dts/owl-*
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F: arch/arm64/boot/dts/actions/
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F: drivers/clocksource/owl-*
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F: drivers/pinctrl/actions/*
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F: drivers/soc/actions/
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F: include/dt-bindings/power/owl-*
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F: include/linux/soc/actions/
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F: Documentation/devicetree/bindings/arm/actions.txt
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F: Documentation/devicetree/bindings/pinctrl/actions,s900-pinctrl.txt
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F: Documentation/devicetree/bindings/power/actions,owl-sps.txt
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F: Documentation/devicetree/bindings/timer/actions,owl-timer.txt
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@@ -11225,6 +11227,7 @@ L: [email protected] (moderated for non-subscribers)
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S: Maintained
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F: Documentation/devicetree/bindings/pinctrl/pinctrl-mt65xx.txt
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F: Documentation/devicetree/bindings/pinctrl/pinctrl-mt7622.txt
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F: drivers/pinctrl/mediatek/mtk-eint.*
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F: drivers/pinctrl/mediatek/pinctrl-mtk-common.*
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F: drivers/pinctrl/mediatek/pinctrl-mt2701.c
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F: drivers/pinctrl/mediatek/pinctrl-mt7622.c

‎drivers/gpio/gpiolib.c

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@@ -2078,6 +2078,11 @@ EXPORT_SYMBOL_GPL(gpiochip_generic_config);
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* @pctldev: the pin controller to map to
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* @gpio_offset: the start offset in the current gpio_chip number space
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* @pin_group: name of the pin group inside the pin controller
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*
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* Calling this function directly from a DeviceTree-supported
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* pinctrl driver is DEPRECATED. Please see Section 2.1 of
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* Documentation/devicetree/bindings/gpio/gpio.txt on how to
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* bind pinctrl and gpio drivers via the "gpio-ranges" property.
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*/
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int gpiochip_add_pingroup_range(struct gpio_chip *chip,
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struct pinctrl_dev *pctldev,
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*
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* Returns:
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* 0 on success, or a negative error-code on failure.
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*
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* Calling this function directly from a DeviceTree-supported
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* pinctrl driver is DEPRECATED. Please see Section 2.1 of
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* Documentation/devicetree/bindings/gpio/gpio.txt on how to
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* bind pinctrl and gpio drivers via the "gpio-ranges" property.
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*/
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int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
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unsigned int gpio_offset, unsigned int pin_offset,

‎drivers/pinctrl/Kconfig

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@@ -337,6 +337,7 @@ config PINCTRL_OCELOT
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select GENERIC_PINMUX_FUNCTIONS
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select REGMAP_MMIO
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source "drivers/pinctrl/actions/Kconfig"
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source "drivers/pinctrl/aspeed/Kconfig"
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source "drivers/pinctrl/bcm/Kconfig"
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source "drivers/pinctrl/berlin/Kconfig"

‎drivers/pinctrl/Makefile

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@@ -43,6 +43,7 @@ obj-$(CONFIG_PINCTRL_INGENIC) += pinctrl-ingenic.o
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obj-$(CONFIG_PINCTRL_RK805) += pinctrl-rk805.o
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obj-$(CONFIG_PINCTRL_OCELOT) += pinctrl-ocelot.o
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obj-y += actions/
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obj-$(CONFIG_ARCH_ASPEED) += aspeed/
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obj-y += bcm/
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obj-$(CONFIG_PINCTRL_BERLIN) += berlin/

‎drivers/pinctrl/actions/Kconfig

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config PINCTRL_OWL
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bool "Actions Semi OWL pinctrl driver"
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depends on (ARCH_ACTIONS || COMPILE_TEST) && OF
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select PINMUX
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select PINCONF
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select GENERIC_PINCONF
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select GPIOLIB
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help
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Say Y here to enable Actions Semi OWL pinctrl driver
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11+
config PINCTRL_S900
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bool "Actions Semi S900 pinctrl driver"
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depends on PINCTRL_OWL
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help
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Say Y here to enable Actions Semi S900 pinctrl driver

‎drivers/pinctrl/actions/Makefile

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obj-$(CONFIG_PINCTRL_OWL) += pinctrl-owl.o
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obj-$(CONFIG_PINCTRL_S900) += pinctrl-s900.o

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