add high level API to set priority of system handlers #117
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src/peripheral/scb.rs
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| /// SV call interrupt | ||
| SVCall, | ||
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| // #[cfg(not(armv6m))] |
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I'm not so hot about having this commented out bit in here. Can we figure out whether it has configurable priority and either take it in or leave it out?
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In the ARMv7 ARM it says (B1.5.1)...
Is there reason to believe it is not configurable?
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It's got PRI_12 in SHPR3 too:
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@adamgreig Thanks. PRI_12 was omitted in the Cortex-M4 documentation I read. (Not the first time ARM omits information about debugging / profiling capabilities in some revisions of their docs)
src/peripheral/scb.rs
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| /// SV call interrupt | ||
| SVCall, | ||
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||
| // #[cfg(not(armv6m))] |
There was a problem hiding this comment.
In the ARMv7 ARM it says (B1.5.1)...
Is there reason to believe it is not configurable?
src/peripheral/scb.rs
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| { | ||
| // NOTE(unsafe) atomic read with no side effects | ||
| let shpr = unsafe { (*Self::ptr()).shpr[usize::from((index - 8) / 4)].read() }; | ||
| let prio = (shpr >> (index % 4)) & 0x000000ff; |
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Should this be (index % 4) * 8?
src/peripheral/scb.rs
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| #[cfg(armv6m)] | ||
| { | ||
| self.shpr[usize::from((index - 8) / 4)].modify(|value| { | ||
| let shift = index % 4; |
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As previous comment, (index % 4) * 8?
it was there to maybe support adding DebugMonitor in the future but it has already been added
lints have changed between nightly and stable
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Addressed review comments |
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bors try |
tryBuild succeeded |
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bors r+ |
117: add high level API to set priority of system handlers r=therealprof a=japaric needed for cortex-m-rtfm v0.4.x (it makes my life easier / it makes it easier to support ARMv6-M) r? @rust-embedded/cortex-m (anyone) Co-authored-by: Jorge Aparicio <[email protected]>
Build succeeded |
needed for cortex-m-rtfm v0.4.x (it makes my life easier / it makes it easier to
support ARMv6-M)
r? @rust-embedded/cortex-m (anyone)