Skip to content

Commit 53fb9d0

Browse files
committed
[InstCombine] Add partial bswap vector test from D88578
1 parent 8825fec commit 53fb9d0

File tree

1 file changed

+22
-0
lines changed
  • llvm/test/Transforms/InstCombine

1 file changed

+22
-0
lines changed

llvm/test/Transforms/InstCombine/bswap.ll

Lines changed: 22 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -519,6 +519,28 @@ define i32 @partial_bswap(i32 %x) {
519519
}
520520
declare i32 @llvm.bswap.i32(i32)
521521

522+
define <2 x i32> @partial_bswap_vector(<2 x i32> %x) {
523+
; CHECK-LABEL: @partial_bswap_vector(
524+
; CHECK-NEXT: [[X3:%.*]] = shl <2 x i32> [[X:%.*]], <i32 24, i32 24>
525+
; CHECK-NEXT: [[A2:%.*]] = shl <2 x i32> [[X]], <i32 8, i32 8>
526+
; CHECK-NEXT: [[X2:%.*]] = and <2 x i32> [[A2]], <i32 16711680, i32 16711680>
527+
; CHECK-NEXT: [[X32:%.*]] = or <2 x i32> [[X3]], [[X2]]
528+
; CHECK-NEXT: [[T1:%.*]] = and <2 x i32> [[X]], <i32 -65536, i32 -65536>
529+
; CHECK-NEXT: [[T2:%.*]] = call <2 x i32> @llvm.bswap.v2i32(<2 x i32> [[T1]])
530+
; CHECK-NEXT: [[R:%.*]] = or <2 x i32> [[X32]], [[T2]]
531+
; CHECK-NEXT: ret <2 x i32> [[R]]
532+
;
533+
%x3 = shl <2 x i32> %x, <i32 24, i32 24>
534+
%a2 = shl <2 x i32> %x, <i32 8, i32 8>
535+
%x2 = and <2 x i32> %a2, <i32 16711680, i32 16711680>
536+
%x32 = or <2 x i32> %x3, %x2
537+
%t1 = and <2 x i32> %x, <i32 -65536, i32 -65536>
538+
%t2 = call <2 x i32> @llvm.bswap.v2i32(<2 x i32> %t1)
539+
%r = or <2 x i32> %x32, %t2
540+
ret <2 x i32> %r
541+
}
542+
declare <2 x i32> @llvm.bswap.v2i32(<2 x i32>)
543+
522544
define i64 @bswap_and_mask_0(i64 %0) {
523545
; CHECK-LABEL: @bswap_and_mask_0(
524546
; CHECK-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP0:%.*]], 56

0 commit comments

Comments
 (0)