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lu-zerognzlbg
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Add Altivec vec_and
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crates/core_arch/src/powerpc/altivec.rs

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@@ -331,9 +331,21 @@ mod sealed {
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impl_vec_trait!{ [$Trait $m] $sh (vector_signed_short, ~vector_bool_short) -> vector_signed_short }
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impl_vec_trait!{ [$Trait $m] $uw (vector_unsigned_int, ~vector_bool_int) -> vector_unsigned_int }
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impl_vec_trait!{ [$Trait $m] $sw (vector_signed_int, ~vector_bool_int) -> vector_signed_int }
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};
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([$Trait:ident $m:ident] ~($fn:ident)) => {
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impl_vec_trait!{ [$Trait $m] ~($fn, $fn, $fn, $fn, $fn, $fn) }
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}
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}
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test_impl! { vec_vand(a: vector_signed_char, b: vector_signed_char) -> vector_signed_char [ simd_and, vand / xxland ] }
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pub trait VectorAnd<Other> {
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type Result;
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unsafe fn vec_and(self, b: Other) -> Self::Result;
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}
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impl_vec_trait! { [VectorAnd vec_and] ~(simd_and) }
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test_impl! { vec_vaddsbs(a: vector_signed_char, b: vector_signed_char) -> vector_signed_char [ vaddsbs, vaddsbs ] }
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test_impl! { vec_vaddshs(a: vector_signed_short, b: vector_signed_short) -> vector_signed_short [ vaddshs, vaddshs ] }
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test_impl! { vec_vaddsws(a: vector_signed_int, b: vector_signed_int) -> vector_signed_int [ vaddsws, vaddsws ] }
@@ -1190,6 +1202,16 @@ mod sealed {
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vector_mladd! { vector_signed_short, vector_signed_short, vector_signed_short }
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}
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/// Vector and.
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#[inline]
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#[target_feature(enable = "altivec")]
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pub unsafe fn vec_and<T, U>(a: T, b: U) -> <T as sealed::VectorAnd<U>>::Result
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where
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T: sealed::VectorAnd<U>,
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{
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a.vec_and(b)
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}
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/// Vector adds.
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#[inline]
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#[target_feature(enable = "altivec")]
@@ -1494,6 +1516,11 @@ mod tests {
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}
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}
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test_vec_2! { test_vec_and, vec_and, i32x4,
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[0b11001100, 0b11001100, 0b11001100, 0b11001100],
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[0b00110011, 0b11110011, 0b00001100, 0b00000000],
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[0b00000000, 0b11000000, 0b00001100, 0b00000000] }
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macro_rules! test_vec_adds {
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{ $name: ident, $ty: ident, [$($a:expr),+], [$($b:expr),+], [$($d:expr),+] } => {
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test_vec_2! {$name, vec_adds, $ty, [$($a),+], [$($b),+], [$($d),+] }

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