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lu-zerognzlbg
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Add Altivec vec_adds
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crates/core_arch/src/powerpc/altivec.rs

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@@ -178,6 +178,20 @@ extern "C" {
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#[link_name = "llvm.ppc.altivec.vaddcuw"]
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fn vaddcuw(a: vector_unsigned_int, b: vector_unsigned_int) -> vector_unsigned_int;
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#[link_name = "llvm.ppc.altivec.vaddsbs"]
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fn vaddsbs(a: vector_signed_char, b: vector_signed_char) -> vector_signed_char;
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#[link_name = "llvm.ppc.altivec.vaddshs"]
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fn vaddshs(a: vector_signed_short, b: vector_signed_short) -> vector_signed_short;
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#[link_name = "llvm.ppc.altivec.vaddsws"]
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fn vaddsws(a: vector_signed_int, b: vector_signed_int) -> vector_signed_int;
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#[link_name = "llvm.ppc.altivec.vaddubs"]
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fn vaddubs(a: vector_unsigned_char, b: vector_unsigned_char) -> vector_unsigned_char;
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#[link_name = "llvm.ppc.altivec.vadduhs"]
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fn vadduhs(a: vector_unsigned_short, b: vector_unsigned_short) -> vector_unsigned_short;
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#[link_name = "llvm.ppc.altivec.vadduws"]
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fn vadduws(a: vector_unsigned_int, b: vector_unsigned_int) -> vector_unsigned_int;
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}
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macro_rules! s_t_l {
@@ -320,6 +334,20 @@ mod sealed {
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}
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}
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test_impl! { vec_vaddsbs(a: vector_signed_char, b: vector_signed_char) -> vector_signed_char [ vaddsbs, vaddsbs ] }
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test_impl! { vec_vaddshs(a: vector_signed_short, b: vector_signed_short) -> vector_signed_short [ vaddshs, vaddshs ] }
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test_impl! { vec_vaddsws(a: vector_signed_int, b: vector_signed_int) -> vector_signed_int [ vaddsws, vaddsws ] }
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test_impl! { vec_vaddubs(a: vector_unsigned_char, b: vector_unsigned_char) -> vector_unsigned_char [ vaddubs, vaddubs ] }
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test_impl! { vec_vadduhs(a: vector_unsigned_short, b: vector_unsigned_short) -> vector_unsigned_short [ vadduhs, vadduhs ] }
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test_impl! { vec_vadduws(a: vector_unsigned_int, b: vector_unsigned_int) -> vector_unsigned_int [ vadduws, vadduws ] }
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pub trait VectorAdds<Other> {
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type Result;
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unsafe fn vec_adds(self, b: Other) -> Self::Result;
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}
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impl_vec_trait! { [VectorAdds vec_adds] ~(vaddubs, vaddsbs, vadduhs, vaddshs, vadduws, vaddsws) }
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test_impl! { vec_vaddcuw(a: vector_unsigned_int, b: vector_unsigned_int) -> vector_unsigned_int [vaddcuw, vaddcuw] }
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test_impl! { vec_vsubsbs(a: vector_signed_char, b: vector_signed_char) -> vector_signed_char [ vsubsbs, vsubsbs ] }
@@ -1162,6 +1190,16 @@ mod sealed {
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vector_mladd! { vector_signed_short, vector_signed_short, vector_signed_short }
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}
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/// Vector adds.
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#[inline]
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#[target_feature(enable = "altivec")]
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pub unsafe fn vec_adds<T, U>(a: T, b: U) -> <T as sealed::VectorAdds<U>>::Result
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where
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T: sealed::VectorAdds<U>,
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{
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a.vec_adds(b)
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}
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/// Vector addc.
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#[inline]
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#[target_feature(enable = "altivec")]
@@ -1456,6 +1494,42 @@ mod tests {
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}
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}
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macro_rules! test_vec_adds {
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{ $name: ident, $ty: ident, [$($a:expr),+], [$($b:expr),+], [$($d:expr),+] } => {
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test_vec_2! {$name, vec_adds, $ty, [$($a),+], [$($b),+], [$($d),+] }
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}
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}
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test_vec_adds! { test_vec_adds_i32x4, i32x4,
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[i32::min_value(), i32::max_value(), 1, -1],
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[-1, 1, 1, -1],
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[i32::min_value(), i32::max_value(), 2, -2] }
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test_vec_adds! { test_vec_adds_u32x4, u32x4,
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[u32::max_value(), 0, 1, 2],
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[2, 1, 0, 0],
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[u32::max_value(), 1, 1, 2] }
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test_vec_adds! { test_vec_adds_i16x8, i16x8,
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[i16::min_value(), i16::max_value(), 1, -1, 0, 0, 0, 0],
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[-1, 1, 1, -1, 0, 0, 0, 0],
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[i16::min_value(), i16::max_value(), 2, -2, 0, 0, 0, 0] }
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test_vec_adds! { test_vec_adds_u16x8, u16x8,
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[u16::max_value(), 0, 1, 2, 0, 0, 0, 0],
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[2, 1, 0, 0, 0, 0, 0, 0],
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[u16::max_value(), 1, 1, 2, 0, 0, 0, 0] }
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test_vec_adds! { test_vec_adds_i8x16, i8x16,
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[i8::min_value(), i8::max_value(), 1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0],
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[-1, 1, 1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0],
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[i8::min_value(), i8::max_value(), 2, -2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0] }
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test_vec_adds! { test_vec_adds_u8x16, u8x16,
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[u8::max_value(), 0, 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0],
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[2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0],
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[u8::max_value(), 1, 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0] }
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test_vec_2! { test_vec_addc, vec_addc, u32x4, [u32::max_value(), 0, 0, 0], [1, 1, 1, 1], [1, 0, 0, 0] }
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macro_rules! test_vec_abs {

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