Skip to content

add neon instruction vget_low_* and fix vget_high_* #1082

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 3 commits into from
Mar 15, 2021
Merged
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
48 changes: 48 additions & 0 deletions crates/core_arch/src/aarch64/neon/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -1520,6 +1520,30 @@ pub unsafe fn vget_high_f64(a: float64x2_t) -> float64x1_t {
float64x1_t(simd_extract(a, 1))
}

/// Duplicate vector element to vector or scalar
#[inline]
#[target_feature(enable = "neon")]
#[cfg_attr(test, assert_instr(ldr))]
pub unsafe fn vget_high_p64(a: poly64x2_t) -> poly64x1_t {
transmute(u64x1::new(simd_extract(a, 1)))
}

/// Duplicate vector element to vector or scalar
#[inline]
#[target_feature(enable = "neon")]
#[cfg_attr(test, assert_instr(ldr))]
pub unsafe fn vget_low_f64(a: float64x2_t) -> float64x1_t {
float64x1_t(simd_extract(a, 0))
}

/// Duplicate vector element to vector or scalar
#[inline]
#[target_feature(enable = "neon")]
#[cfg_attr(test, assert_instr(ldr))]
pub unsafe fn vget_low_p64(a: poly64x2_t) -> poly64x1_t {
transmute(u64x1::new(simd_extract(a, 0)))
}

/* FIXME: 16-bit float
/// Vector combine
#[inline]
Expand Down Expand Up @@ -3483,6 +3507,30 @@ mod tests {
assert_eq!(r, e);
}

#[simd_test(enable = "neon")]
unsafe fn test_vget_high_p64() {
let a = u64x2::new(1, 2);
let e = u64x1::new(2);
let r: u64x1 = transmute(vget_high_p64(transmute(a)));
assert_eq!(r, e);
}

#[simd_test(enable = "neon")]
unsafe fn test_vget_low_f64() {
let a = f64x2::new(1.0, 2.0);
let e = f64x1::new(1.0);
let r: f64x1 = transmute(vget_low_f64(transmute(a)));
assert_eq!(r, e);
}

#[simd_test(enable = "neon")]
unsafe fn test_vget_low_p64() {
let a = u64x2::new(1, 2);
let e = u64x1::new(1);
let r: u64x1 = transmute(vget_low_p64(transmute(a)));
assert_eq!(r, e);
}

#[simd_test(enable = "neon")]
unsafe fn test_vceq_u64() {
test_cmp_u64(
Expand Down
212 changes: 196 additions & 16 deletions crates/core_arch/src/arm/neon/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -3848,18 +3848,118 @@ pub unsafe fn vget_high_p16(a: poly16x8_t) -> poly16x4_t {
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(ext))]
pub unsafe fn vget_high_p64(a: poly64x2_t) -> poly64x1_t {
poly64x1_t(simd_extract(a, 1))
pub unsafe fn vget_high_f32(a: float32x4_t) -> float32x2_t {
simd_shuffle2(a, a, [2, 3])
}

/// Duplicate vector element to vector or scalar
#[inline]
#[target_feature(enable = "neon")]
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(ext))]
pub unsafe fn vget_high_f32(a: float32x4_t) -> float32x2_t {
simd_shuffle2(a, a, [2, 3])
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("ldr"))]
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(ldr))]
pub unsafe fn vget_low_s8(a: int8x16_t) -> int8x8_t {
simd_shuffle8(a, a, [0, 1, 2, 3, 4, 5, 6, 7])
}

/// Duplicate vector element to vector or scalar
#[inline]
#[target_feature(enable = "neon")]
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("ldr"))]
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(ldr))]
pub unsafe fn vget_low_s16(a: int16x8_t) -> int16x4_t {
simd_shuffle4(a, a, [0, 1, 2, 3])
}

/// Duplicate vector element to vector or scalar
#[inline]
#[target_feature(enable = "neon")]
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("ldr"))]
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(ldr))]
pub unsafe fn vget_low_s32(a: int32x4_t) -> int32x2_t {
simd_shuffle2(a, a, [0, 1])
}

/// Duplicate vector element to vector or scalar
#[inline]
#[target_feature(enable = "neon")]
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("ldr"))]
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(ldr))]
pub unsafe fn vget_low_s64(a: int64x2_t) -> int64x1_t {
int64x1_t(simd_extract(a, 0))
}

/// Duplicate vector element to vector or scalar
#[inline]
#[target_feature(enable = "neon")]
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("ldr"))]
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(ldr))]
pub unsafe fn vget_low_u8(a: uint8x16_t) -> uint8x8_t {
simd_shuffle8(a, a, [0, 1, 2, 3, 4, 5, 6, 7])
}

/// Duplicate vector element to vector or scalar
#[inline]
#[target_feature(enable = "neon")]
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("ldr"))]
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(ldr))]
pub unsafe fn vget_low_u16(a: uint16x8_t) -> uint16x4_t {
simd_shuffle4(a, a, [0, 1, 2, 3])
}

/// Duplicate vector element to vector or scalar
#[inline]
#[target_feature(enable = "neon")]
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("ldr"))]
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(ldr))]
pub unsafe fn vget_low_u32(a: uint32x4_t) -> uint32x2_t {
simd_shuffle2(a, a, [0, 1])
}

/// Duplicate vector element to vector or scalar
#[inline]
#[target_feature(enable = "neon")]
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("ldr"))]
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(ldr))]
pub unsafe fn vget_low_u64(a: uint64x2_t) -> uint64x1_t {
uint64x1_t(simd_extract(a, 0))
}

/// Duplicate vector element to vector or scalar
#[inline]
#[target_feature(enable = "neon")]
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("ldr"))]
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(ldr))]
pub unsafe fn vget_low_p8(a: poly8x16_t) -> poly8x8_t {
simd_shuffle8(a, a, [0, 1, 2, 3, 4, 5, 6, 7])
}

/// Duplicate vector element to vector or scalar
#[inline]
#[target_feature(enable = "neon")]
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("ldr"))]
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(ldr))]
pub unsafe fn vget_low_p16(a: poly16x8_t) -> poly16x4_t {
simd_shuffle4(a, a, [0, 1, 2, 3])
}

/// Duplicate vector element to vector or scalar
#[inline]
#[target_feature(enable = "neon")]
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("ldr"))]
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(ldr))]
pub unsafe fn vget_low_f32(a: float32x4_t) -> float32x2_t {
simd_shuffle2(a, a, [0, 1])
}

/// Duplicate vector element to vector or scalar
Expand Down Expand Up @@ -5853,31 +5953,31 @@ mod tests {
unsafe fn test_vget_high_u8() {
let a = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
let e = u8x8::new(9, 10, 11, 12, 13, 14, 15, 16);
let r: u8x8 = transmute(vget_high_s8(transmute(a)));
let r: u8x8 = transmute(vget_high_u8(transmute(a)));
assert_eq!(r, e);
}

#[simd_test(enable = "neon")]
unsafe fn test_vget_high_u16() {
let a = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
let e = u16x4::new(5, 6, 7, 8);
let r: u16x4 = transmute(vget_high_s16(transmute(a)));
let r: u16x4 = transmute(vget_high_u16(transmute(a)));
assert_eq!(r, e);
}

#[simd_test(enable = "neon")]
unsafe fn test_vget_high_u32() {
let a = u32x4::new(1, 2, 3, 4);
let e = u32x2::new(3, 4);
let r: u32x2 = transmute(vget_high_s32(transmute(a)));
let r: u32x2 = transmute(vget_high_u32(transmute(a)));
assert_eq!(r, e);
}

#[simd_test(enable = "neon")]
unsafe fn test_vget_high_u64() {
let a = u64x2::new(1, 2);
let e = u64x1::new(2);
let r: u64x1 = transmute(vget_high_s64(transmute(a)));
let r: u64x1 = transmute(vget_high_u64(transmute(a)));
assert_eq!(r, e);
}

Expand All @@ -5898,18 +5998,98 @@ mod tests {
}

#[simd_test(enable = "neon")]
unsafe fn test_vget_high_p64() {
unsafe fn test_vget_high_f32() {
let a = f32x4::new(1.0, 2.0, 3.0, 4.0);
let e = f32x2::new(3.0, 4.0);
let r: f32x2 = transmute(vget_high_f32(transmute(a)));
assert_eq!(r, e);
}

#[simd_test(enable = "neon")]
unsafe fn test_vget_low_s8() {
let a = i8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
let e = i8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
let r: i8x8 = transmute(vget_low_s8(transmute(a)));
assert_eq!(r, e);
}

#[simd_test(enable = "neon")]
unsafe fn test_vget_low_s16() {
let a = i16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
let e = i16x4::new(1, 2, 3, 4);
let r: i16x4 = transmute(vget_low_s16(transmute(a)));
assert_eq!(r, e);
}

#[simd_test(enable = "neon")]
unsafe fn test_vget_low_s32() {
let a = i32x4::new(1, 2, 3, 4);
let e = i32x2::new(1, 2);
let r: i32x2 = transmute(vget_low_s32(transmute(a)));
assert_eq!(r, e);
}

#[simd_test(enable = "neon")]
unsafe fn test_vget_low_s64() {
let a = i64x2::new(1, 2);
let e = i64x1::new(1);
let r: i64x1 = transmute(vget_low_s64(transmute(a)));
assert_eq!(r, e);
}

#[simd_test(enable = "neon")]
unsafe fn test_vget_low_u8() {
let a = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
let e = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
let r: u8x8 = transmute(vget_low_u8(transmute(a)));
assert_eq!(r, e);
}

#[simd_test(enable = "neon")]
unsafe fn test_vget_low_u16() {
let a = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
let e = u16x4::new(1, 2, 3, 4);
let r: u16x4 = transmute(vget_low_u16(transmute(a)));
assert_eq!(r, e);
}

#[simd_test(enable = "neon")]
unsafe fn test_vget_low_u32() {
let a = u32x4::new(1, 2, 3, 4);
let e = u32x2::new(1, 2);
let r: u32x2 = transmute(vget_low_u32(transmute(a)));
assert_eq!(r, e);
}

#[simd_test(enable = "neon")]
unsafe fn test_vget_low_u64() {
let a = u64x2::new(1, 2);
let e = u64x1::new(2);
let r: u64x1 = transmute(vget_high_p64(transmute(a)));
let e = u64x1::new(1);
let r: u64x1 = transmute(vget_low_u64(transmute(a)));
assert_eq!(r, e);
}

#[simd_test(enable = "neon")]
unsafe fn test_vget_high_f32() {
unsafe fn test_vget_low_p8() {
let a = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
let e = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
let r: u8x8 = transmute(vget_low_p8(transmute(a)));
assert_eq!(r, e);
}

#[simd_test(enable = "neon")]
unsafe fn test_vget_low_p16() {
let a = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
let e = u16x4::new(1, 2, 3, 4);
let r: u16x4 = transmute(vget_low_p16(transmute(a)));
assert_eq!(r, e);
}

#[simd_test(enable = "neon")]
unsafe fn test_vget_low_f32() {
let a = f32x4::new(1.0, 2.0, 3.0, 4.0);
let e = f32x2::new(3.0, 4.0);
let r: f32x2 = transmute(vget_high_f32(transmute(a)));
let e = f32x2::new(1.0, 2.0);
let r: f32x2 = transmute(vget_low_f32(transmute(a)));
assert_eq!(r, e);
}

Expand Down