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[GlobalISel] Fix crash in RBS with a non-generic IMPLICIT_DEF.
This may occur when swifterror codegen in the translator generates these, but we shouldn't try to handle them since they should have regclasses anyway. rdar://75784009 Differential Revision: https://reviews.llvm.org/D99287
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3 files changed

+74
-48
lines changed

3 files changed

+74
-48
lines changed

‎llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -719,6 +719,10 @@ bool RegBankSelect::runOnMachineFunction(MachineFunction &MF) {
719719
if (MI.isDebugInstr())
720720
continue;
721721

722+
// Ignore IMPLICIT_DEF which must have a regclass.
723+
if (MI.isImplicitDef())
724+
continue;
725+
722726
if (!assignInstr(MI)) {
723727
reportGISelFailure(MF, *TPC, *MORE, "gisel-regbankselect",
724728
"unable to map instruction", MI);

‎llvm/test/CodeGen/AArch64/GlobalISel/implicit_def_rbs_crash.mir

Lines changed: 22 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,22 @@
1+
# RUN: llc -O0 -mtriple arm64-- -run-pass=regbankselect -verify-machineinstrs %s -o - | FileCheck %s
2+
3+
# Check we don't crash given an non-generic implicit_def. These may
4+
# come from swifterror handling in the translator.
5+
# CHECK: IMPLICIT_DEF
6+
---
7+
name: implicit_def_crash
8+
alignment: 4
9+
legalized: true
10+
regBankSelected: false
11+
selected: false
12+
failedISel: false
13+
registers:
14+
- { id: 0, class: gpr64all, preferred-register: '' }
15+
- { id: 1, class: _, preferred-register: '' }
16+
- { id: 2, class: gpr64all, preferred-register: '' }
17+
- { id: 3, class: gpr64all, preferred-register: '' }
18+
body: |
19+
bb.1:
20+
%0:gpr64all = IMPLICIT_DEF
21+
22+
...

‎llvm/test/CodeGen/X86/GlobalISel/regbankselect-X86_64.mir

Lines changed: 48 additions & 48 deletions
Original file line numberDiff line numberDiff line change
@@ -625,29 +625,29 @@ body: |
625625
bb.1 (%ir-block.0):
626626
627627
; FAST-LABEL: name: test_mul_gpr
628-
; FAST: [[DEF:%[0-9]+]]:gpr(s64) = IMPLICIT_DEF
629-
; FAST: [[DEF1:%[0-9]+]]:gpr(s32) = IMPLICIT_DEF
630-
; FAST: [[DEF2:%[0-9]+]]:gpr(s16) = IMPLICIT_DEF
631-
; FAST: [[DEF3:%[0-9]+]]:gpr(s8) = IMPLICIT_DEF
628+
; FAST: [[DEF:%[0-9]+]]:gpr(s64) = G_IMPLICIT_DEF
629+
; FAST: [[DEF1:%[0-9]+]]:gpr(s32) = G_IMPLICIT_DEF
630+
; FAST: [[DEF2:%[0-9]+]]:gpr(s16) = G_IMPLICIT_DEF
631+
; FAST: [[DEF3:%[0-9]+]]:gpr(s8) = G_IMPLICIT_DEF
632632
; FAST: [[MUL:%[0-9]+]]:gpr(s64) = G_MUL [[DEF]], [[DEF]]
633633
; FAST: [[MUL1:%[0-9]+]]:gpr(s32) = G_MUL [[DEF1]], [[DEF1]]
634634
; FAST: [[MUL2:%[0-9]+]]:gpr(s16) = G_MUL [[DEF2]], [[DEF2]]
635635
; FAST: [[MUL3:%[0-9]+]]:gpr(s8) = G_MUL [[DEF3]], [[DEF3]]
636636
; FAST: RET 0
637637
; GREEDY-LABEL: name: test_mul_gpr
638-
; GREEDY: [[DEF:%[0-9]+]]:gpr(s64) = IMPLICIT_DEF
639-
; GREEDY: [[DEF1:%[0-9]+]]:gpr(s32) = IMPLICIT_DEF
640-
; GREEDY: [[DEF2:%[0-9]+]]:gpr(s16) = IMPLICIT_DEF
641-
; GREEDY: [[DEF3:%[0-9]+]]:gpr(s8) = IMPLICIT_DEF
638+
; GREEDY: [[DEF:%[0-9]+]]:gpr(s64) = G_IMPLICIT_DEF
639+
; GREEDY: [[DEF1:%[0-9]+]]:gpr(s32) = G_IMPLICIT_DEF
640+
; GREEDY: [[DEF2:%[0-9]+]]:gpr(s16) = G_IMPLICIT_DEF
641+
; GREEDY: [[DEF3:%[0-9]+]]:gpr(s8) = G_IMPLICIT_DEF
642642
; GREEDY: [[MUL:%[0-9]+]]:gpr(s64) = G_MUL [[DEF]], [[DEF]]
643643
; GREEDY: [[MUL1:%[0-9]+]]:gpr(s32) = G_MUL [[DEF1]], [[DEF1]]
644644
; GREEDY: [[MUL2:%[0-9]+]]:gpr(s16) = G_MUL [[DEF2]], [[DEF2]]
645645
; GREEDY: [[MUL3:%[0-9]+]]:gpr(s8) = G_MUL [[DEF3]], [[DEF3]]
646646
; GREEDY: RET 0
647-
%0(s64) = IMPLICIT_DEF
648-
%1(s32) = IMPLICIT_DEF
649-
%2(s16) = IMPLICIT_DEF
650-
%3(s8) = IMPLICIT_DEF
647+
%0(s64) = G_IMPLICIT_DEF
648+
%1(s32) = G_IMPLICIT_DEF
649+
%2(s16) = G_IMPLICIT_DEF
650+
%3(s8) = G_IMPLICIT_DEF
651651
%4(s64) = G_MUL %0, %0
652652
%5(s32) = G_MUL %1, %1
653653
%6(s16) = G_MUL %2, %2
@@ -767,8 +767,8 @@ constants:
767767
body: |
768768
bb.1 (%ir-block.0):
769769
; FAST-LABEL: name: test_fsub_float
770-
; FAST: [[DEF:%[0-9]+]]:gpr(s32) = IMPLICIT_DEF
771-
; FAST: [[DEF1:%[0-9]+]]:gpr(s64) = IMPLICIT_DEF
770+
; FAST: [[DEF:%[0-9]+]]:gpr(s32) = G_IMPLICIT_DEF
771+
; FAST: [[DEF1:%[0-9]+]]:gpr(s64) = G_IMPLICIT_DEF
772772
; FAST: [[COPY:%[0-9]+]]:vecr(s32) = COPY [[DEF]](s32)
773773
; FAST: [[COPY1:%[0-9]+]]:vecr(s32) = COPY [[DEF]](s32)
774774
; FAST: [[FSUB:%[0-9]+]]:vecr(s32) = G_FSUB [[COPY]], [[COPY1]]
@@ -777,17 +777,17 @@ body: |
777777
; FAST: [[FSUB1:%[0-9]+]]:vecr(s64) = G_FSUB [[COPY2]], [[COPY3]]
778778
; FAST: RET 0
779779
; GREEDY-LABEL: name: test_fsub_float
780-
; GREEDY: [[DEF:%[0-9]+]]:gpr(s32) = IMPLICIT_DEF
781-
; GREEDY: [[DEF1:%[0-9]+]]:gpr(s64) = IMPLICIT_DEF
780+
; GREEDY: [[DEF:%[0-9]+]]:gpr(s32) = G_IMPLICIT_DEF
781+
; GREEDY: [[DEF1:%[0-9]+]]:gpr(s64) = G_IMPLICIT_DEF
782782
; GREEDY: [[COPY:%[0-9]+]]:vecr(s32) = COPY [[DEF]](s32)
783783
; GREEDY: [[COPY1:%[0-9]+]]:vecr(s32) = COPY [[DEF]](s32)
784784
; GREEDY: [[FSUB:%[0-9]+]]:vecr(s32) = G_FSUB [[COPY]], [[COPY1]]
785785
; GREEDY: [[COPY2:%[0-9]+]]:vecr(s64) = COPY [[DEF1]](s64)
786786
; GREEDY: [[COPY3:%[0-9]+]]:vecr(s64) = COPY [[DEF1]](s64)
787787
; GREEDY: [[FSUB1:%[0-9]+]]:vecr(s64) = G_FSUB [[COPY2]], [[COPY3]]
788788
; GREEDY: RET 0
789-
%0(s32) = IMPLICIT_DEF
790-
%2(s64) = IMPLICIT_DEF
789+
%0(s32) = G_IMPLICIT_DEF
790+
%2(s64) = G_IMPLICIT_DEF
791791
%1(s32) = G_FSUB %0, %0
792792
%3(s64) = G_FSUB %2, %2
793793
RET 0
@@ -810,8 +810,8 @@ constants:
810810
body: |
811811
bb.1 (%ir-block.0):
812812
; FAST-LABEL: name: test_fmul_float
813-
; FAST: [[DEF:%[0-9]+]]:gpr(s32) = IMPLICIT_DEF
814-
; FAST: [[DEF1:%[0-9]+]]:gpr(s64) = IMPLICIT_DEF
813+
; FAST: [[DEF:%[0-9]+]]:gpr(s32) = G_IMPLICIT_DEF
814+
; FAST: [[DEF1:%[0-9]+]]:gpr(s64) = G_IMPLICIT_DEF
815815
; FAST: [[COPY:%[0-9]+]]:vecr(s32) = COPY [[DEF]](s32)
816816
; FAST: [[COPY1:%[0-9]+]]:vecr(s32) = COPY [[DEF]](s32)
817817
; FAST: [[FMUL:%[0-9]+]]:vecr(s32) = G_FMUL [[COPY]], [[COPY1]]
@@ -820,17 +820,17 @@ body: |
820820
; FAST: [[FMUL1:%[0-9]+]]:vecr(s64) = G_FMUL [[COPY2]], [[COPY3]]
821821
; FAST: RET 0
822822
; GREEDY-LABEL: name: test_fmul_float
823-
; GREEDY: [[DEF:%[0-9]+]]:gpr(s32) = IMPLICIT_DEF
824-
; GREEDY: [[DEF1:%[0-9]+]]:gpr(s64) = IMPLICIT_DEF
823+
; GREEDY: [[DEF:%[0-9]+]]:gpr(s32) = G_IMPLICIT_DEF
824+
; GREEDY: [[DEF1:%[0-9]+]]:gpr(s64) = G_IMPLICIT_DEF
825825
; GREEDY: [[COPY:%[0-9]+]]:vecr(s32) = COPY [[DEF]](s32)
826826
; GREEDY: [[COPY1:%[0-9]+]]:vecr(s32) = COPY [[DEF]](s32)
827827
; GREEDY: [[FMUL:%[0-9]+]]:vecr(s32) = G_FMUL [[COPY]], [[COPY1]]
828828
; GREEDY: [[COPY2:%[0-9]+]]:vecr(s64) = COPY [[DEF1]](s64)
829829
; GREEDY: [[COPY3:%[0-9]+]]:vecr(s64) = COPY [[DEF1]](s64)
830830
; GREEDY: [[FMUL1:%[0-9]+]]:vecr(s64) = G_FMUL [[COPY2]], [[COPY3]]
831831
; GREEDY: RET 0
832-
%0(s32) = IMPLICIT_DEF
833-
%2(s64) = IMPLICIT_DEF
832+
%0(s32) = G_IMPLICIT_DEF
833+
%2(s64) = G_IMPLICIT_DEF
834834
%1(s32) = G_FMUL %0, %0
835835
%3(s64) = G_FMUL %2, %2
836836
RET 0
@@ -853,8 +853,8 @@ constants:
853853
body: |
854854
bb.1 (%ir-block.0):
855855
; FAST-LABEL: name: test_fdiv_float
856-
; FAST: [[DEF:%[0-9]+]]:gpr(s32) = IMPLICIT_DEF
857-
; FAST: [[DEF1:%[0-9]+]]:gpr(s64) = IMPLICIT_DEF
856+
; FAST: [[DEF:%[0-9]+]]:gpr(s32) = G_IMPLICIT_DEF
857+
; FAST: [[DEF1:%[0-9]+]]:gpr(s64) = G_IMPLICIT_DEF
858858
; FAST: [[COPY:%[0-9]+]]:vecr(s32) = COPY [[DEF]](s32)
859859
; FAST: [[COPY1:%[0-9]+]]:vecr(s32) = COPY [[DEF]](s32)
860860
; FAST: [[FDIV:%[0-9]+]]:vecr(s32) = G_FDIV [[COPY]], [[COPY1]]
@@ -863,17 +863,17 @@ body: |
863863
; FAST: [[FDIV1:%[0-9]+]]:vecr(s64) = G_FDIV [[COPY2]], [[COPY3]]
864864
; FAST: RET 0
865865
; GREEDY-LABEL: name: test_fdiv_float
866-
; GREEDY: [[DEF:%[0-9]+]]:gpr(s32) = IMPLICIT_DEF
867-
; GREEDY: [[DEF1:%[0-9]+]]:gpr(s64) = IMPLICIT_DEF
866+
; GREEDY: [[DEF:%[0-9]+]]:gpr(s32) = G_IMPLICIT_DEF
867+
; GREEDY: [[DEF1:%[0-9]+]]:gpr(s64) = G_IMPLICIT_DEF
868868
; GREEDY: [[COPY:%[0-9]+]]:vecr(s32) = COPY [[DEF]](s32)
869869
; GREEDY: [[COPY1:%[0-9]+]]:vecr(s32) = COPY [[DEF]](s32)
870870
; GREEDY: [[FDIV:%[0-9]+]]:vecr(s32) = G_FDIV [[COPY]], [[COPY1]]
871871
; GREEDY: [[COPY2:%[0-9]+]]:vecr(s64) = COPY [[DEF1]](s64)
872872
; GREEDY: [[COPY3:%[0-9]+]]:vecr(s64) = COPY [[DEF1]](s64)
873873
; GREEDY: [[FDIV1:%[0-9]+]]:vecr(s64) = G_FDIV [[COPY2]], [[COPY3]]
874874
; GREEDY: RET 0
875-
%0(s32) = IMPLICIT_DEF
876-
%2(s64) = IMPLICIT_DEF
875+
%0(s32) = G_IMPLICIT_DEF
876+
%2(s64) = G_IMPLICIT_DEF
877877
%1(s32) = G_FDIV %0, %0
878878
%3(s64) = G_FDIV %2, %2
879879
RET 0
@@ -1349,18 +1349,18 @@ registers:
13491349
body: |
13501350
bb.0 (%ir-block.0):
13511351
; FAST-LABEL: name: trunc_check
1352-
; FAST: [[DEF:%[0-9]+]]:gpr(s32) = IMPLICIT_DEF
1352+
; FAST: [[DEF:%[0-9]+]]:gpr(s32) = G_IMPLICIT_DEF
13531353
; FAST: [[TRUNC:%[0-9]+]]:gpr(s1) = G_TRUNC [[DEF]](s32)
13541354
; FAST: [[TRUNC1:%[0-9]+]]:gpr(s8) = G_TRUNC [[DEF]](s32)
13551355
; FAST: [[TRUNC2:%[0-9]+]]:gpr(s16) = G_TRUNC [[DEF]](s32)
13561356
; FAST: RET 0
13571357
; GREEDY-LABEL: name: trunc_check
1358-
; GREEDY: [[DEF:%[0-9]+]]:gpr(s32) = IMPLICIT_DEF
1358+
; GREEDY: [[DEF:%[0-9]+]]:gpr(s32) = G_IMPLICIT_DEF
13591359
; GREEDY: [[TRUNC:%[0-9]+]]:gpr(s1) = G_TRUNC [[DEF]](s32)
13601360
; GREEDY: [[TRUNC1:%[0-9]+]]:gpr(s8) = G_TRUNC [[DEF]](s32)
13611361
; GREEDY: [[TRUNC2:%[0-9]+]]:gpr(s16) = G_TRUNC [[DEF]](s32)
13621362
; GREEDY: RET 0
1363-
%0(s32) = IMPLICIT_DEF
1363+
%0(s32) = G_IMPLICIT_DEF
13641364
%1(s1) = G_TRUNC %0(s32)
13651365
%2(s8) = G_TRUNC %0(s32)
13661366
%3(s16) = G_TRUNC %0(s32)
@@ -1379,20 +1379,20 @@ registers:
13791379
body: |
13801380
bb.0 (%ir-block.0):
13811381
; FAST-LABEL: name: test_gep
1382-
; FAST: [[DEF:%[0-9]+]]:gpr(p0) = IMPLICIT_DEF
1382+
; FAST: [[DEF:%[0-9]+]]:gpr(p0) = G_IMPLICIT_DEF
13831383
; FAST: [[C:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 20
13841384
; FAST: [[PTR_ADD:%[0-9]+]]:gpr(p0) = G_PTR_ADD [[DEF]], [[C]](s32)
13851385
; FAST: [[C1:%[0-9]+]]:gpr(s64) = G_CONSTANT i64 20
13861386
; FAST: [[PTR_ADD1:%[0-9]+]]:gpr(p0) = G_PTR_ADD [[DEF]], [[C1]](s64)
13871387
; FAST: RET 0
13881388
; GREEDY-LABEL: name: test_gep
1389-
; GREEDY: [[DEF:%[0-9]+]]:gpr(p0) = IMPLICIT_DEF
1389+
; GREEDY: [[DEF:%[0-9]+]]:gpr(p0) = G_IMPLICIT_DEF
13901390
; GREEDY: [[C:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 20
13911391
; GREEDY: [[PTR_ADD:%[0-9]+]]:gpr(p0) = G_PTR_ADD [[DEF]], [[C]](s32)
13921392
; GREEDY: [[C1:%[0-9]+]]:gpr(s64) = G_CONSTANT i64 20
13931393
; GREEDY: [[PTR_ADD1:%[0-9]+]]:gpr(p0) = G_PTR_ADD [[DEF]], [[C1]](s64)
13941394
; GREEDY: RET 0
1395-
%0(p0) = IMPLICIT_DEF
1395+
%0(p0) = G_IMPLICIT_DEF
13961396
%1(s32) = G_CONSTANT i32 20
13971397
%2(p0) = G_PTR_ADD %0, %1(s32)
13981398
%3(s64) = G_CONSTANT i64 20
@@ -1567,16 +1567,16 @@ constants:
15671567
body: |
15681568
bb.1 (%ir-block.0):
15691569
; FAST-LABEL: name: test_xor_i8
1570-
; FAST: [[DEF:%[0-9]+]]:gpr(s8) = IMPLICIT_DEF
1570+
; FAST: [[DEF:%[0-9]+]]:gpr(s8) = G_IMPLICIT_DEF
15711571
; FAST: [[XOR:%[0-9]+]]:gpr(s8) = G_XOR [[DEF]], [[DEF]]
15721572
; FAST: $al = COPY [[XOR]](s8)
15731573
; FAST: RET 0, implicit $al
15741574
; GREEDY-LABEL: name: test_xor_i8
1575-
; GREEDY: [[DEF:%[0-9]+]]:gpr(s8) = IMPLICIT_DEF
1575+
; GREEDY: [[DEF:%[0-9]+]]:gpr(s8) = G_IMPLICIT_DEF
15761576
; GREEDY: [[XOR:%[0-9]+]]:gpr(s8) = G_XOR [[DEF]], [[DEF]]
15771577
; GREEDY: $al = COPY [[XOR]](s8)
15781578
; GREEDY: RET 0, implicit $al
1579-
%0(s8) = IMPLICIT_DEF
1579+
%0(s8) = G_IMPLICIT_DEF
15801580
%1(s8) = G_XOR %0, %0
15811581
$al = COPY %1(s8)
15821582
RET 0, implicit $al
@@ -1597,16 +1597,16 @@ constants:
15971597
body: |
15981598
bb.1 (%ir-block.0):
15991599
; FAST-LABEL: name: test_or_i16
1600-
; FAST: [[DEF:%[0-9]+]]:gpr(s16) = IMPLICIT_DEF
1600+
; FAST: [[DEF:%[0-9]+]]:gpr(s16) = G_IMPLICIT_DEF
16011601
; FAST: [[OR:%[0-9]+]]:gpr(s16) = G_OR [[DEF]], [[DEF]]
16021602
; FAST: $ax = COPY [[OR]](s16)
16031603
; FAST: RET 0, implicit $ax
16041604
; GREEDY-LABEL: name: test_or_i16
1605-
; GREEDY: [[DEF:%[0-9]+]]:gpr(s16) = IMPLICIT_DEF
1605+
; GREEDY: [[DEF:%[0-9]+]]:gpr(s16) = G_IMPLICIT_DEF
16061606
; GREEDY: [[OR:%[0-9]+]]:gpr(s16) = G_OR [[DEF]], [[DEF]]
16071607
; GREEDY: $ax = COPY [[OR]](s16)
16081608
; GREEDY: RET 0, implicit $ax
1609-
%0(s16) = IMPLICIT_DEF
1609+
%0(s16) = G_IMPLICIT_DEF
16101610
%1(s16) = G_OR %0, %0
16111611
$ax = COPY %1(s16)
16121612
RET 0, implicit $ax
@@ -1627,16 +1627,16 @@ constants:
16271627
body: |
16281628
bb.1 (%ir-block.0):
16291629
; FAST-LABEL: name: test_and_i32
1630-
; FAST: [[DEF:%[0-9]+]]:gpr(s32) = IMPLICIT_DEF
1630+
; FAST: [[DEF:%[0-9]+]]:gpr(s32) = G_IMPLICIT_DEF
16311631
; FAST: [[AND:%[0-9]+]]:gpr(s32) = G_AND [[DEF]], [[DEF]]
16321632
; FAST: $eax = COPY [[AND]](s32)
16331633
; FAST: RET 0, implicit $eax
16341634
; GREEDY-LABEL: name: test_and_i32
1635-
; GREEDY: [[DEF:%[0-9]+]]:gpr(s32) = IMPLICIT_DEF
1635+
; GREEDY: [[DEF:%[0-9]+]]:gpr(s32) = G_IMPLICIT_DEF
16361636
; GREEDY: [[AND:%[0-9]+]]:gpr(s32) = G_AND [[DEF]], [[DEF]]
16371637
; GREEDY: $eax = COPY [[AND]](s32)
16381638
; GREEDY: RET 0, implicit $eax
1639-
%0(s32) = IMPLICIT_DEF
1639+
%0(s32) = G_IMPLICIT_DEF
16401640
%1(s32) = G_AND %0, %0
16411641
$eax = COPY %1(s32)
16421642
RET 0, implicit $eax
@@ -1657,16 +1657,16 @@ constants:
16571657
body: |
16581658
bb.1 (%ir-block.0):
16591659
; FAST-LABEL: name: test_and_i64
1660-
; FAST: [[DEF:%[0-9]+]]:gpr(s64) = IMPLICIT_DEF
1660+
; FAST: [[DEF:%[0-9]+]]:gpr(s64) = G_IMPLICIT_DEF
16611661
; FAST: [[AND:%[0-9]+]]:gpr(s64) = G_AND [[DEF]], [[DEF]]
16621662
; FAST: $rax = COPY [[AND]](s64)
16631663
; FAST: RET 0, implicit $rax
16641664
; GREEDY-LABEL: name: test_and_i64
1665-
; GREEDY: [[DEF:%[0-9]+]]:gpr(s64) = IMPLICIT_DEF
1665+
; GREEDY: [[DEF:%[0-9]+]]:gpr(s64) = G_IMPLICIT_DEF
16661666
; GREEDY: [[AND:%[0-9]+]]:gpr(s64) = G_AND [[DEF]], [[DEF]]
16671667
; GREEDY: $rax = COPY [[AND]](s64)
16681668
; GREEDY: RET 0, implicit $rax
1669-
%0(s64) = IMPLICIT_DEF
1669+
%0(s64) = G_IMPLICIT_DEF
16701670
%1(s64) = G_AND %0, %0
16711671
$rax = COPY %1(s64)
16721672
RET 0, implicit $rax

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