@@ -2033,6 +2033,10 @@ multiclass VPseudoBinaryFV_VV<LMULInfo m, string Constraint = ""> {
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defm _VV : VPseudoBinary<m.vrclass, m.vrclass, m.vrclass, m, Constraint>;
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}
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+ multiclass VPseudoBinaryFV_VV_E<LMULInfo m, int sew, string Constraint = ""> {
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+ defm _VV : VPseudoBinary_E<m.vrclass, m.vrclass, m.vrclass, m, sew, Constraint>;
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+ }
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+
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multiclass VPseudoVGTR_VV_EEW<int eew, string Constraint = ""> {
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foreach m = MxList in {
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defvar mx = m.MX;
@@ -2060,6 +2064,10 @@ multiclass VPseudoBinaryV_VX<LMULInfo m, string Constraint = ""> {
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defm "_VX" : VPseudoBinary<m.vrclass, m.vrclass, GPR, m, Constraint>;
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}
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+ multiclass VPseudoBinaryV_VX_E<LMULInfo m, int sew, string Constraint = ""> {
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+ defm "_VX" : VPseudoBinary_E<m.vrclass, m.vrclass, GPR, m, sew, Constraint>;
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+ }
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+
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multiclass VPseudoVSLD1_VX<string Constraint = ""> {
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foreach m = MxList in {
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defvar mx = m.MX;
@@ -2077,6 +2085,12 @@ multiclass VPseudoBinaryV_VF<LMULInfo m, FPR_Info f, string Constraint = ""> {
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f.fprclass, m, Constraint>;
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}
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+ multiclass VPseudoBinaryV_VF_E<LMULInfo m, int sew, FPR_Info f,
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+ string Constraint = ""> {
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+ defm "_V" # f.FX : VPseudoBinary_E<m.vrclass, m.vrclass,
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+ f.fprclass, m, sew, Constraint>;
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+ }
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+
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multiclass VPseudoVSLD1_VF<string Constraint = ""> {
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foreach f = FPList in {
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foreach m = f.MxList in {
@@ -2621,15 +2635,18 @@ multiclass VPseudoVMUL_VV_VX {
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multiclass VPseudoVDIV_VV_VX {
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foreach m = MxList in {
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defvar mx = m.MX;
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- defvar WriteVIDivV_MX = !cast<SchedWrite>("WriteVIDivV_" # mx);
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- defvar WriteVIDivX_MX = !cast<SchedWrite>("WriteVIDivX_" # mx);
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- defvar ReadVIDivV_MX = !cast<SchedRead>("ReadVIDivV_" # mx);
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- defvar ReadVIDivX_MX = !cast<SchedRead>("ReadVIDivX_" # mx);
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-
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- defm "" : VPseudoBinaryV_VV<m>,
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- Sched<[WriteVIDivV_MX, ReadVIDivV_MX, ReadVIDivV_MX, ReadVMask]>;
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- defm "" : VPseudoBinaryV_VX<m>,
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- Sched<[WriteVIDivX_MX, ReadVIDivV_MX, ReadVIDivX_MX, ReadVMask]>;
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+ defvar sews = SchedSEWSet<mx>.val;
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+ foreach e = sews in {
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+ defvar WriteVIDivV_MX_E = !cast<SchedWrite>("WriteVIDivV_" # mx # "_E" # e);
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+ defvar WriteVIDivX_MX_E = !cast<SchedWrite>("WriteVIDivX_" # mx # "_E" # e);
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+ defvar ReadVIDivV_MX_E = !cast<SchedRead>("ReadVIDivV_" # mx # "_E" # e);
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+ defvar ReadVIDivX_MX_E = !cast<SchedRead>("ReadVIDivX_" # mx # "_E" # e);
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+
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+ defm "" : VPseudoBinaryV_VV_E<m, e>,
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+ Sched<[WriteVIDivV_MX_E, ReadVIDivV_MX_E, ReadVIDivV_MX_E, ReadVMask]>;
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+ defm "" : VPseudoBinaryV_VX_E<m, e>,
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+ Sched<[WriteVIDivX_MX_E, ReadVIDivV_MX_E, ReadVIDivX_MX_E, ReadVMask]>;
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+ }
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}
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}
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@@ -2659,22 +2676,28 @@ multiclass VPseudoVFMUL_VV_VF {
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multiclass VPseudoVFDIV_VV_VF {
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foreach m = MxListF in {
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defvar mx = m.MX;
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- defvar WriteVFDivV_MX = !cast<SchedWrite>("WriteVFDivV_" # mx);
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- defvar ReadVFDivV_MX = !cast<SchedRead>("ReadVFDivV_" # mx);
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+ defvar sews = SchedSEWSet<mx>.val;
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+ foreach e = sews in {
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+ defvar WriteVFDivV_MX_E = !cast<SchedWrite>("WriteVFDivV_" # mx # "_E" # e);
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+ defvar ReadVFDivV_MX_E = !cast<SchedRead>("ReadVFDivV_" # mx # "_E" # e);
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- defm "" : VPseudoBinaryFV_VV<m>,
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- Sched<[WriteVFDivV_MX, ReadVFDivV_MX, ReadVFDivV_MX, ReadVMask]>;
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+ defm "" : VPseudoBinaryFV_VV_E<m, e>,
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+ Sched<[WriteVFDivV_MX_E, ReadVFDivV_MX_E, ReadVFDivV_MX_E, ReadVMask]>;
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+ }
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}
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foreach f = FPList in {
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foreach m = f.MxList in {
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defvar mx = m.MX;
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- defvar WriteVFDivF_MX = !cast<SchedWrite>("WriteVFDivF_" # mx);
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- defvar ReadVFDivV_MX = !cast<SchedRead>("ReadVFDivV_" # mx);
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- defvar ReadVFDivF_MX = !cast<SchedRead>("ReadVFDivF_" # mx);
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+ defvar sews = SchedSEWSet<mx>.val;
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+ foreach e = sews in {
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+ defvar WriteVFDivF_MX_E = !cast<SchedWrite>("WriteVFDivF_" # mx # "_E" # e);
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+ defvar ReadVFDivV_MX_E = !cast<SchedRead>("ReadVFDivV_" # mx # "_E" # e);
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+ defvar ReadVFDivF_MX_E = !cast<SchedRead>("ReadVFDivF_" # mx # "_E" # e);
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- defm "" : VPseudoBinaryV_VF<m, f>,
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- Sched<[WriteVFDivF_MX, ReadVFDivV_MX, ReadVFDivF_MX, ReadVMask]>;
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+ defm "" : VPseudoBinaryV_VF_E<m, e, f>,
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+ Sched<[WriteVFDivF_MX_E, ReadVFDivV_MX_E, ReadVFDivF_MX_E, ReadVMask]>;
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+ }
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}
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}
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}
@@ -2683,11 +2706,15 @@ multiclass VPseudoVFRDIV_VF {
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foreach f = FPList in {
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foreach m = f.MxList in {
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defvar mx = m.MX;
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- defvar WriteVFDivF_MX = !cast<SchedWrite>("WriteVFDivF_" # mx);
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- defvar ReadVFDivV_MX = !cast<SchedRead>("ReadVFDivV_" # mx);
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- defvar ReadVFDivF_MX = !cast<SchedRead>("ReadVFDivF_" # mx);
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- defm "" : VPseudoBinaryV_VF<m, f>,
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- Sched<[WriteVFDivF_MX, ReadVFDivV_MX, ReadVFDivF_MX, ReadVMask]>;
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+ defvar sews = SchedSEWSet<mx>.val;
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+ foreach e = sews in {
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+ defvar WriteVFDivF_MX_E = !cast<SchedWrite>("WriteVFDivF_" # mx # "_E" # e);
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+ defvar ReadVFDivV_MX_E = !cast<SchedRead>("ReadVFDivV_" # mx # "_E" # e);
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+ defvar ReadVFDivF_MX_E = !cast<SchedRead>("ReadVFDivF_" # mx # "_E" # e);
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+
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+ defm "" : VPseudoBinaryV_VF_E<m, e, f>,
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+ Sched<[WriteVFDivF_MX_E, ReadVFDivV_MX_E, ReadVFDivF_MX_E, ReadVMask]>;
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+ }
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}
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}
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}
@@ -4503,6 +4530,16 @@ multiclass VPatBinaryV_VV<string intrinsic, string instruction,
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vti.RegClass, vti.RegClass>;
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}
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+ multiclass VPatBinaryV_VV_E<string intrinsic, string instruction,
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+ list<VTypeInfo> vtilist> {
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+ foreach vti = vtilist in
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+ defm : VPatBinaryTA<intrinsic,
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+ instruction # "_VV_" # vti.LMul.MX # "_E" # vti.SEW,
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+ vti.Vector, vti.Vector, vti.Vector,vti.Mask,
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+ vti.Log2SEW, vti.RegClass,
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+ vti.RegClass, vti.RegClass>;
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+ }
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+
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multiclass VPatBinaryV_VV_INT_E<string intrinsic, string instruction,
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list<VTypeInfo> vtilist> {
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foreach vti = vtilist in {
@@ -4545,6 +4582,18 @@ multiclass VPatBinaryV_VX<string intrinsic, string instruction,
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}
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}
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+ multiclass VPatBinaryV_VX_E<string intrinsic, string instruction,
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+ list<VTypeInfo> vtilist> {
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+ foreach vti = vtilist in {
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+ defvar kind = "V"#vti.ScalarSuffix;
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+ defm : VPatBinaryTA<intrinsic,
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+ instruction#"_"#kind#"_"#vti.LMul.MX#"_E"#vti.SEW,
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+ vti.Vector, vti.Vector, vti.Scalar, vti.Mask,
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+ vti.Log2SEW, vti.RegClass,
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+ vti.RegClass, vti.ScalarRegClass>;
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+ }
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+ }
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+
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multiclass VPatBinaryV_VX_INT<string intrinsic, string instruction,
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list<VTypeInfo> vtilist> {
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foreach vti = vtilist in
@@ -4810,6 +4859,11 @@ multiclass VPatBinaryV_VV_VX<string intrinsic, string instruction,
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: VPatBinaryV_VV<intrinsic, instruction, vtilist>,
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VPatBinaryV_VX<intrinsic, instruction, vtilist>;
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+ multiclass VPatBinaryV_VV_VX_E<string intrinsic, string instruction,
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+ list<VTypeInfo> vtilist>
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+ : VPatBinaryV_VV_E<intrinsic, instruction, vtilist>,
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+ VPatBinaryV_VX_E<intrinsic, instruction, vtilist>;
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+
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multiclass VPatBinaryV_VX_VI<string intrinsic, string instruction,
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list<VTypeInfo> vtilist>
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: VPatBinaryV_VX<intrinsic, instruction, vtilist>,
@@ -6091,10 +6145,10 @@ defm : VPatBinaryV_VV_VX<"int_riscv_vmulhsu", "PseudoVMULHSU", AllIntegerVectors
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//===----------------------------------------------------------------------===//
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// 11.11. Vector Integer Divide Instructions
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//===----------------------------------------------------------------------===//
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- defm : VPatBinaryV_VV_VX <"int_riscv_vdivu", "PseudoVDIVU", AllIntegerVectors>;
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- defm : VPatBinaryV_VV_VX <"int_riscv_vdiv", "PseudoVDIV", AllIntegerVectors>;
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- defm : VPatBinaryV_VV_VX <"int_riscv_vremu", "PseudoVREMU", AllIntegerVectors>;
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- defm : VPatBinaryV_VV_VX <"int_riscv_vrem", "PseudoVREM", AllIntegerVectors>;
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+ defm : VPatBinaryV_VV_VX_E <"int_riscv_vdivu", "PseudoVDIVU", AllIntegerVectors>;
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+ defm : VPatBinaryV_VV_VX_E <"int_riscv_vdiv", "PseudoVDIV", AllIntegerVectors>;
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+ defm : VPatBinaryV_VV_VX_E <"int_riscv_vremu", "PseudoVREMU", AllIntegerVectors>;
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+ defm : VPatBinaryV_VV_VX_E <"int_riscv_vrem", "PseudoVREM", AllIntegerVectors>;
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//===----------------------------------------------------------------------===//
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// 11.12. Vector Widening Integer Multiply Instructions
@@ -6207,8 +6261,8 @@ defm : VPatBinaryW_WV_WX<"int_riscv_vfwsub_w", "PseudoVFWSUB", AllWidenableFloat
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// 13.4. Vector Single-Width Floating-Point Multiply/Divide Instructions
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//===----------------------------------------------------------------------===//
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defm : VPatBinaryV_VV_VX<"int_riscv_vfmul", "PseudoVFMUL", AllFloatVectors>;
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- defm : VPatBinaryV_VV_VX <"int_riscv_vfdiv", "PseudoVFDIV", AllFloatVectors>;
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- defm : VPatBinaryV_VX <"int_riscv_vfrdiv", "PseudoVFRDIV", AllFloatVectors>;
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+ defm : VPatBinaryV_VV_VX_E <"int_riscv_vfdiv", "PseudoVFDIV", AllFloatVectors>;
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+ defm : VPatBinaryV_VX_E <"int_riscv_vfrdiv", "PseudoVFRDIV", AllFloatVectors>;
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//===----------------------------------------------------------------------===//
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// 13.5. Vector Widening Floating-Point Multiply
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