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Revert "[GISEL] Add IRTranslation for shufflevector on scalable vector types" (llvm#84330)
Reverts llvm#80378 causing Buildbot failures that did not show up with check-llvm or CI.
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15 files changed

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‎llvm/docs/GlobalISel/GenericOpcode.rst

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -639,11 +639,6 @@ Concatenate two vectors and shuffle the elements according to the mask operand.
639639
The mask operand should be an IR Constant which exactly matches the
640640
corresponding mask for the IR shufflevector instruction.
641641

642-
G_SPLAT_VECTOR
643-
^^^^^^^^^^^^^^^^
644-
645-
Create a vector where all elements are the scalar from the source operand.
646-
647642
Vector Reduction Operations
648643
---------------------------
649644

‎llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h

Lines changed: 2 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -1063,7 +1063,8 @@ class MachineIRBuilder {
10631063

10641064
/// Build and insert \p Res = G_BUILD_VECTOR with \p Src replicated to fill
10651065
/// the number of elements
1066-
MachineInstrBuilder buildSplatBuildVector(const DstOp &Res, const SrcOp &Src);
1066+
MachineInstrBuilder buildSplatVector(const DstOp &Res,
1067+
const SrcOp &Src);
10671068

10681069
/// Build and insert \p Res = G_BUILD_VECTOR_TRUNC \p Op0, ...
10691070
///
@@ -1098,15 +1099,6 @@ class MachineIRBuilder {
10981099
MachineInstrBuilder buildShuffleVector(const DstOp &Res, const SrcOp &Src1,
10991100
const SrcOp &Src2, ArrayRef<int> Mask);
11001101

1101-
/// Build and insert \p Res = G_SPLAT_VECTOR \p Val
1102-
///
1103-
/// \pre setBasicBlock or setMI must have been called.
1104-
/// \pre \p Res must be a generic virtual register with vector type.
1105-
/// \pre \p Val must be a generic virtual register with scalar type.
1106-
///
1107-
/// \return a MachineInstrBuilder for the newly created instruction.
1108-
MachineInstrBuilder buildSplatVector(const DstOp &Res, const SrcOp &Val);
1109-
11101102
/// Build and insert \p Res = G_CONCAT_VECTORS \p Op0, ...
11111103
///
11121104
/// G_CONCAT_VECTORS creates a vector from the concatenation of 2 or more

‎llvm/include/llvm/Support/TargetOpcodes.def

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -736,9 +736,6 @@ HANDLE_TARGET_OPCODE(G_EXTRACT_VECTOR_ELT)
736736
/// Generic shufflevector.
737737
HANDLE_TARGET_OPCODE(G_SHUFFLE_VECTOR)
738738

739-
/// Generic splatvector.
740-
HANDLE_TARGET_OPCODE(G_SPLAT_VECTOR)
741-
742739
/// Generic count trailing zeroes.
743740
HANDLE_TARGET_OPCODE(G_CTTZ)
744741

‎llvm/include/llvm/Target/GenericOpcodes.td

Lines changed: 0 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1450,13 +1450,6 @@ def G_SHUFFLE_VECTOR: GenericInstruction {
14501450
let hasSideEffects = false;
14511451
}
14521452

1453-
// Generic splatvector.
1454-
def G_SPLAT_VECTOR: GenericInstruction {
1455-
let OutOperandList = (outs type0:$dst);
1456-
let InOperandList = (ins type1:$val);
1457-
let hasSideEffects = false;
1458-
}
1459-
14601453
//------------------------------------------------------------------------------
14611454
// Vector reductions
14621455
//------------------------------------------------------------------------------

‎llvm/lib/CodeGen/GlobalISel/CSEMIRBuilder.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -309,7 +309,7 @@ MachineInstrBuilder CSEMIRBuilder::buildConstant(const DstOp &Res,
309309
// For vectors, CSE the element only for now.
310310
LLT Ty = Res.getLLTTy(*getMRI());
311311
if (Ty.isVector())
312-
return buildSplatBuildVector(Res, buildConstant(Ty.getElementType(), Val));
312+
return buildSplatVector(Res, buildConstant(Ty.getElementType(), Val));
313313

314314
FoldingSetNodeID ID;
315315
GISelInstProfileBuilder ProfBuilder(ID, *getMRI());
@@ -336,7 +336,7 @@ MachineInstrBuilder CSEMIRBuilder::buildFConstant(const DstOp &Res,
336336
// For vectors, CSE the element only for now.
337337
LLT Ty = Res.getLLTTy(*getMRI());
338338
if (Ty.isVector())
339-
return buildSplatBuildVector(Res, buildFConstant(Ty.getElementType(), Val));
339+
return buildSplatVector(Res, buildFConstant(Ty.getElementType(), Val));
340340

341341
FoldingSetNodeID ID;
342342
GISelInstProfileBuilder ProfBuilder(ID, *getMRI());

‎llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp

Lines changed: 6 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -1598,10 +1598,10 @@ bool IRTranslator::translateGetElementPtr(const User &U,
15981598
// We might need to splat the base pointer into a vector if the offsets
15991599
// are vectors.
16001600
if (WantSplatVector && !PtrTy.isVector()) {
1601-
BaseReg = MIRBuilder
1602-
.buildSplatBuildVector(LLT::fixed_vector(VectorWidth, PtrTy),
1603-
BaseReg)
1604-
.getReg(0);
1601+
BaseReg =
1602+
MIRBuilder
1603+
.buildSplatVector(LLT::fixed_vector(VectorWidth, PtrTy), BaseReg)
1604+
.getReg(0);
16051605
PtrIRTy = FixedVectorType::get(PtrIRTy, VectorWidth);
16061606
PtrTy = getLLTForType(*PtrIRTy, *DL);
16071607
OffsetIRTy = DL->getIndexType(PtrIRTy);
@@ -1639,10 +1639,8 @@ bool IRTranslator::translateGetElementPtr(const User &U,
16391639
LLT IdxTy = MRI->getType(IdxReg);
16401640
if (IdxTy != OffsetTy) {
16411641
if (!IdxTy.isVector() && WantSplatVector) {
1642-
IdxReg = MIRBuilder
1643-
.buildSplatBuildVector(OffsetTy.changeElementType(IdxTy),
1644-
IdxReg)
1645-
.getReg(0);
1642+
IdxReg = MIRBuilder.buildSplatVector(
1643+
OffsetTy.changeElementType(IdxTy), IdxReg).getReg(0);
16461644
}
16471645

16481646
IdxReg = MIRBuilder.buildSExtOrTrunc(OffsetTy, IdxReg).getReg(0);
@@ -2999,19 +2997,6 @@ bool IRTranslator::translateExtractElement(const User &U,
29992997

30002998
bool IRTranslator::translateShuffleVector(const User &U,
30012999
MachineIRBuilder &MIRBuilder) {
3002-
// A ShuffleVector that has operates on scalable vectors is a splat vector
3003-
// where the value of the splat vector is the 0th element of the first
3004-
// operand, since the index mask operand is the zeroinitializer (undef and
3005-
// poison are treated as zeroinitializer here).
3006-
if (U.getOperand(0)->getType()->isScalableTy()) {
3007-
Value *Op0 = U.getOperand(0);
3008-
auto SplatVal = MIRBuilder.buildExtractVectorElementConstant(
3009-
LLT::scalar(Op0->getType()->getScalarSizeInBits()),
3010-
getOrCreateVReg(*Op0), 0);
3011-
MIRBuilder.buildSplatVector(getOrCreateVReg(U), SplatVal);
3012-
return true;
3013-
}
3014-
30153000
ArrayRef<int> Mask;
30163001
if (auto *SVI = dyn_cast<ShuffleVectorInst>(&U))
30173002
Mask = SVI->getShuffleMask();

‎llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -8391,7 +8391,7 @@ static Register getMemsetValue(Register Val, LLT Ty, MachineIRBuilder &MIB) {
83918391

83928392
// For vector types create a G_BUILD_VECTOR.
83938393
if (Ty.isVector())
8394-
Val = MIB.buildSplatBuildVector(Ty, Val).getReg(0);
8394+
Val = MIB.buildSplatVector(Ty, Val).getReg(0);
83958395

83968396
return Val;
83978397
}

‎llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp

Lines changed: 4 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -326,7 +326,7 @@ MachineInstrBuilder MachineIRBuilder::buildConstant(const DstOp &Res,
326326
auto Const = buildInstr(TargetOpcode::G_CONSTANT)
327327
.addDef(getMRI()->createGenericVirtualRegister(EltTy))
328328
.addCImm(&Val);
329-
return buildSplatBuildVector(Res, Const);
329+
return buildSplatVector(Res, Const);
330330
}
331331

332332
auto Const = buildInstr(TargetOpcode::G_CONSTANT);
@@ -363,7 +363,7 @@ MachineInstrBuilder MachineIRBuilder::buildFConstant(const DstOp &Res,
363363
.addDef(getMRI()->createGenericVirtualRegister(EltTy))
364364
.addFPImm(&Val);
365365

366-
return buildSplatBuildVector(Res, Const);
366+
return buildSplatVector(Res, Const);
367367
}
368368

369369
auto Const = buildInstr(TargetOpcode::G_FCONSTANT);
@@ -711,8 +711,8 @@ MachineIRBuilder::buildBuildVectorConstant(const DstOp &Res,
711711
return buildInstr(TargetOpcode::G_BUILD_VECTOR, Res, TmpVec);
712712
}
713713

714-
MachineInstrBuilder MachineIRBuilder::buildSplatBuildVector(const DstOp &Res,
715-
const SrcOp &Src) {
714+
MachineInstrBuilder MachineIRBuilder::buildSplatVector(const DstOp &Res,
715+
const SrcOp &Src) {
716716
SmallVector<SrcOp, 8> TmpVec(Res.getLLTTy(*getMRI()).getNumElements(), Src);
717717
return buildInstr(TargetOpcode::G_BUILD_VECTOR, Res, TmpVec);
718718
}
@@ -742,14 +742,6 @@ MachineInstrBuilder MachineIRBuilder::buildShuffleSplat(const DstOp &Res,
742742
return buildShuffleVector(DstTy, InsElt, UndefVec, ZeroMask);
743743
}
744744

745-
MachineInstrBuilder MachineIRBuilder::buildSplatVector(const DstOp &Res,
746-
const SrcOp &Src) {
747-
LLT DstTy = Res.getLLTTy(*getMRI());
748-
assert(Src.getLLTTy(*getMRI()) == DstTy.getElementType() &&
749-
"Expected Src to match Dst elt ty");
750-
return buildInstr(TargetOpcode::G_SPLAT_VECTOR, Res, Src);
751-
}
752-
753745
MachineInstrBuilder MachineIRBuilder::buildShuffleVector(const DstOp &Res,
754746
const SrcOp &Src1,
755747
const SrcOp &Src2,

‎llvm/lib/CodeGen/MachineVerifier.cpp

Lines changed: 0 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -1640,24 +1640,6 @@ void MachineVerifier::verifyPreISelGenericInstruction(const MachineInstr *MI) {
16401640

16411641
break;
16421642
}
1643-
1644-
case TargetOpcode::G_SPLAT_VECTOR: {
1645-
LLT DstTy = MRI->getType(MI->getOperand(0).getReg());
1646-
LLT SrcTy = MRI->getType(MI->getOperand(1).getReg());
1647-
1648-
if (!DstTy.isScalableVector())
1649-
report("Destination type must be a scalable vector", MI);
1650-
1651-
if (!SrcTy.isScalar())
1652-
report("Source type must be a scalar", MI);
1653-
1654-
if (DstTy.getScalarType() != SrcTy)
1655-
report("Element type of the destination must be the same type as the "
1656-
"source type",
1657-
MI);
1658-
1659-
break;
1660-
}
16611643
case TargetOpcode::G_DYN_STACKALLOC: {
16621644
const MachineOperand &DstOp = MI->getOperand(0);
16631645
const MachineOperand &AllocOp = MI->getOperand(1);

‎llvm/lib/Target/RISCV/RISCVISelLowering.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -20920,8 +20920,7 @@ bool RISCVTargetLowering::fallBackToDAGISel(const Instruction &Inst) const {
2092020920
unsigned Op = Inst.getOpcode();
2092120921
if (Op == Instruction::Add || Op == Instruction::Sub ||
2092220922
Op == Instruction::And || Op == Instruction::Or ||
20923-
Op == Instruction::Xor || Op == Instruction::InsertElement ||
20924-
Op == Instruction::Xor || Op == Instruction::ShuffleVector)
20923+
Op == Instruction::Xor || Op == Instruction::InsertElement)
2092520924
return false;
2092620925

2092720926
if (Inst.getType()->isScalableTy())

‎llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -625,9 +625,6 @@
625625
# DEBUG-NEXT: G_SHUFFLE_VECTOR (opcode {{[0-9]+}}): 2 type indices, 0 imm indices
626626
# DEBUG-NEXT: .. type index coverage check SKIPPED: user-defined predicate detected
627627
# DEBUG-NEXT: .. imm index coverage check SKIPPED: user-defined predicate detected
628-
# DEBUG-NEXT: G_SPLAT_VECTOR (opcode 217): 2 type indices, 0 imm indices
629-
# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
630-
# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
631628
# DEBUG-NEXT: G_CTTZ (opcode {{[0-9]+}}): 2 type indices, 0 imm indices
632629
# DEBUG-NEXT: .. type index coverage check SKIPPED: user-defined predicate detected
633630
# DEBUG-NEXT: .. imm index coverage check SKIPPED: user-defined predicate detected

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